2008 |
11 | EE | K. Takeuchi,
A. Yoshikawa,
M. Komoda,
K. Kotani,
H. Matsushita,
Y. Katsuki,
Y. Yamamoto,
T. Sato:
Clock-Skew Test Module for Exploring Reliable Clock-Distribution Under Process and Global Voltage-Temperature Variations.
IEEE Trans. VLSI Syst. 16(11): 1559-1566 (2008) |
2007 |
10 | EE | Bhakti S. S. Onggo,
K. Kusano,
T. Sato:
Macro-Micro Economic System Simulation.
PADS 2007: 105-112 |
2006 |
9 | EE | N. Okada,
Chikaaki Kodama,
T. Sato,
Kunihiro Fujiyoshi:
Thermal Driven Module Placement Using Sequence-pair.
APCCAS 2006: 1871-1874 |
8 | EE | Y. Ito,
T. Sato,
Noritaka Yamashita,
Jianming Lu,
Hiroo Sekiya,
Takashi Yahagi:
Impulse noise detector using mathematical morphology.
ISCAS 2006 |
2005 |
7 | EE | H. Nagasaka,
T. Sato,
T. Sugiura,
E. Otobe,
M. Hasegawa,
K. Tanji,
N. Otani,
T. Shimamori:
The modem for ultra-wideband communication employing surface-acoustic-wave devices.
ISCAS (4) 2005: 3950-3953 |
2003 |
6 | EE | A. Uchida,
T. Sato,
S. Yoshimori,
F. Kannari:
Transient Characteristics between Periodic attractors stabilized by Chaos Control in a semiconductor Laser.
I. J. Bifurcation and Chaos 13(5): 1309-1317 (2003) |
2002 |
5 | EE | Takashi Hirayama,
Yasuaki Nishitani,
T. Sato:
A faster algorithm of minimizing AND-EXOR expressions.
APCCAS (2) 2002: 293-298 |
4 | EE | T. Sato,
S. Takagi,
N. Fujii:
Rail-to-rail OTA using a pair of single channel type MOSFETs.
ISCAS (1) 2002: 329-332 |
1991 |
3 | | T. Sato,
M. Nakajima,
T. Sukemura,
G. Goto:
A Regularly Structured 54-bit Modified-Wallace-Tree Multiplier.
VLSI 1991: 1-10 |
1990 |
2 | | T. Sato,
G. Theeragool,
T. Yamamoto,
M. Okamoto,
Y. Kobayashi:
Revised nucleotide sequence of the sporulation gene spoVE from Bacillus subtilis.
Nucleic Acids Research 18(13): 4021 (1990) |
1988 |
1 | | K. Okamoto,
M. Miyata,
H. Kishigami,
T. Miyamori,
T. Sato:
Design Considerations for 32-bit Microprocessor TX3.
COMPCON 1988: 25-29 |