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Michael D. Powell

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2009
14EEMichael D. Powell, Arijit Biswas, Joel S. Emer, Shubhendu S. Mukherjee, Basit R. Sheikh, Shrirang M. Yardi: CAMP: A technique to estimate per-structure power at run-time using a few simple parameters. HPCA 2009: 289-300
2007
13EEMichael D. Powell, T. N. Vijaykumar: Resource area dilation to reduce power density in throughput servers. ISLPED 2007: 268-273
2005
12EEZeshan Chishti, Michael D. Powell, T. N. Vijaykumar: Optimizing Replication, Communication, and Capacity Allocation in CMPs. ISCA 2005: 357-368
11EEMichael D. Powell, Ethan Schuchman, T. N. Vijaykumar: Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines. MICRO 2005: 294-304
2004
10EEMohamed A. Gomaa, Michael D. Powell, T. N. Vijaykumar: Heat-and-run: leveraging SMT and CMP to manage power density through the operating system. ASPLOS 2004: 260-270
9EEMichael D. Powell, T. N. Vijaykumar: Exploiting Resonant Behavior to Reduce Inductive Noise. ISCA 2004: 288-301
2003
8EEMichael D. Powell, T. N. Vijaykumar: Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage. ISCA 2003: 72-83
7EEMichael D. Powell, T. N. Vijaykumar: Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise. ISLPED 2003: 223-228
6EEZeshan Chishti, Michael D. Powell, T. N. Vijaykumar: Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures. MICRO 2003: 55-66
2002
5EESe-Hyun Yang, Michael D. Powell, Babak Falsafi, T. N. Vijaykumar: Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay. HPCA 2002: 151-
4EEIl Park, Michael D. Powell, T. N. Vijaykumar: Reducing register ports for higher speed and lower energy. MICRO 2002: 171-182
2001
3EESe-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar: An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches. HPCA 2001: 147-158
2EEMichael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, Kaushik Roy: Reducing set-associative cache energy via way-prediction and selective direct-mapping. MICRO 2001: 54-65
1EEMichael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar: Reducing leakage in a high-performance deep-submicron instruction cache. IEEE Trans. VLSI Syst. 9(1): 77-89 (2001)

Coauthor Index

1Amit Agarwal [2]
2Arijit Biswas [14]
3Zeshan Chishti [6] [12]
4Joel S. Emer [14]
5Babak Falsafi [1] [2] [3] [5]
6Mohamed A. Gomaa [10]
7Shubhendu S. Mukherjee [14]
8Il Park [4]
9Kaushik Roy [1] [2] [3]
10Ethan Schuchman [11]
11Basit R. Sheikh [14]
12T. N. Vijaykumar [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
13Se-Hyun Yang [1] [3] [5]
14Shrirang M. Yardi [14]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)