| 2007 |
|---|
| 6 | EE | Kim T. Le,
Dong Hyun Baik,
Kewal K. Saluja:
Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan.
VLSI Design 2007: 769-774 |
| 2005 |
|---|
| 5 | EE | Hiroshi Takahashi,
Keith J. Keller,
Kim T. Le,
Kewal K. Saluja,
Yuzo Takamatsu:
A method for reducing the target fault list of crosstalk faults in synchronous sequential circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 252-263 (2005) |
| 2002 |
|---|
| 4 | EE | Marong Phadoongsidhi,
Kim T. Le,
Kewal K. Saluja:
A Concurrent Fault Simulation for Crosstalk Faults in Sequential Circuits.
Asian Test Symposium 2002: 182- |
| 3 | EE | Keith J. Keller,
Hiroshi Takahashi,
Kim T. Le,
Kewal K. Saluja,
Yuzo Takamatsu:
Reduction of Target Fault List for Crosstalk-Induced Delay Faults by using Layout Constraints.
Asian Test Symposium 2002: 242-247 |
| 1998 |
|---|
| 2 | EE | Kim T. Le,
Kewal K. Saluja:
A Heuristic Measure to Maximize Detected Faults per Test.
J. Electronic Testing 13(1): 57-60 (1998) |
| 1986 |
|---|
| 1 | | Kim T. Le,
Kewal K. Saluja:
A Novel Approach for Testing Memories Using a Built-In Self Testing Technique.
ITC 1986: 830-839 |
