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Kim T. Le

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2007
6EEKim T. Le, Dong Hyun Baik, Kewal K. Saluja: Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan. VLSI Design 2007: 769-774
2005
5EEHiroshi Takahashi, Keith J. Keller, Kim T. Le, Kewal K. Saluja, Yuzo Takamatsu: A method for reducing the target fault list of crosstalk faults in synchronous sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 252-263 (2005)
2002
4EEMarong Phadoongsidhi, Kim T. Le, Kewal K. Saluja: A Concurrent Fault Simulation for Crosstalk Faults in Sequential Circuits. Asian Test Symposium 2002: 182-
3EEKeith J. Keller, Hiroshi Takahashi, Kim T. Le, Kewal K. Saluja, Yuzo Takamatsu: Reduction of Target Fault List for Crosstalk-Induced Delay Faults by using Layout Constraints. Asian Test Symposium 2002: 242-247
1998
2EEKim T. Le, Kewal K. Saluja: A Heuristic Measure to Maximize Detected Faults per Test. J. Electronic Testing 13(1): 57-60 (1998)
1986
1 Kim T. Le, Kewal K. Saluja: A Novel Approach for Testing Memories Using a Built-In Self Testing Technique. ITC 1986: 830-839

Coauthor Index

1Dong Hyun Baik [6]
2Keith J. Keller [3] [5]
3Marong Phadoongsidhi [4]
4Kewal K. Saluja [1] [2] [3] [4] [5] [6]
5Hiroshi Takahashi [3] [5]
6Yuzo Takamatsu [3] [5]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)