2005 |
10 | EE | Chi-Keung Luk,
Robert S. Cohn,
Robert Muth,
Harish Patil,
Artur Klauser,
P. Geoffrey Lowney,
Steven Wallace,
Vijay Janapa Reddi,
Kim M. Hazelwood:
Pin: building customized program analysis tools with dynamic instrumentation.
PLDI 2005: 190-200 |
2004 |
9 | EE | Chi-Keung Luk,
Robert Muth,
Harish Patil,
Robert S. Cohn,
P. Geoffrey Lowney:
Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture.
CGO 2004: 15-26 |
2002 |
8 | EE | Chi-Keung Luk,
Robert Muth,
Harish Patil,
Richard Weiss,
P. Geoffrey Lowney,
Robert S. Cohn:
Profile-guided post-link stride prefetching.
ICS 2002: 167-178 |
7 | EE | Roger Espasa,
Federico Ardanaz,
Julio Gago,
Roger Gramunt,
Isaac Hernandez,
Toni Juan,
Joel S. Emer,
Stephen Felix,
P. Geoffrey Lowney,
Matthew Mattina,
André Seznec:
Tarantula: A Vector Extension to the Alpha Architecture.
ISCA 2002: 281- |
2001 |
6 | EE | Alex Ramírez,
Luiz André Barroso,
Kourosh Gharachorloo,
Robert S. Cohn,
Josep-Lluis Larriba-Pey,
P. Geoffrey Lowney,
Mateo Valero:
Code layout optimizations for transaction processing workloads.
ISCA 2001: 155-164 |
2000 |
5 | EE | Robert S. Cohn,
P. Geoffrey Lowney:
Design and Analysis of Profile-Based Optimization in Compaq's Compilation Tools for Alpha.
J. Instruction-Level Parallelism 2: (2000) |
1998 |
4 | EE | Robert S. Cohn,
David W. Goodwin,
P. Geoffrey Lowney:
Optimizing Alpha Executables on Windows NT with Spike.
Digital Technical Journal 9(4): (1998) |
1996 |
3 | EE | Robert S. Cohn,
P. Geoffrey Lowney:
Hot Cold Optimization of Large Windows/NT Applications.
MICRO 1996: 80-89 |
1994 |
2 | EE | Stefan Freudenberger,
Thomas R. Gross,
P. Geoffrey Lowney:
Avoidance and Supression of Compensation Code in a Trace Scheduling Compiler.
ACM Trans. Program. Lang. Syst. 16(4): 1156-1214 (1994) |
1981 |
1 | | P. Geoffrey Lowney:
Carrier Arrays: An Idiom-Preserving Extension to APL.
POPL 1981: 1-13 |