S. Das

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15EEGurdip Singh, Valeriy Kolesnikov, S. Das: Methodologies for optimization of distributed algorithms and middleware. IPDPS 2008: 1-5
14EETao He, Fengyuan Ren, Chuang Lin, S. Das: Alleviating Congestion Using Traffic-Aware Dynamic Routing in Wireless Sensor Networks. SECON 2008: 233-241
13EES. Das, H. Viswanathan: A comparison of reverse link access schemes for next-generation cellular systems. IEEE Journal on Selected Areas in Communications 24(3): 684-692 (2006)
12EES. Kal, S. Das, D. K. Maurya, K. Biswas, A. Ravi Sankar, S. K. Lahiri: CMOS compatible bulk micromachined silicon piezoresistive accelerometer with low off-axis sensitivity. Microelectronics Journal 37(1): 22-30 (2006)
11EEK. Biswas, S. Das, D. K. Maurya, S. Kal, S. K. Lahiri: Bulk micromachining of silicon in TMAH-based etchants for aluminum passivation and smooth surface. Microelectronics Journal 37(4): 321-327 (2006)
10EEK. Biswas, S. Das, S. Kal: Analysis and prevention of convex corner undercutting in bulk micromachined silicon microstructures. Microelectronics Journal 37(8): 765-769 (2006)
9EES. Das, Elza Erkip, Joseph R. Cavallaro, Behnaam Aazhang: Low-complexity iterative multiuser detection and decoding for real-time applications. IEEE Transactions on Wireless Communications 4(4): 1455-1460 (2005)
8EES. Das, Lokenath Debnath: Interaction between Griffith cracks in a sandwiched orthotropic layer. Appl. Math. Lett. 16(4): 609-617 (2003)
7EEYu-Chee Tseng, Jang-Ping Sheu, S. Das, R.-S. Chang: Special issue: Research in ad hoc networking, smart sensing, and pervasive computing. Wireless Communications and Mobile Computing 3(4): 407-410 (2003)
6EES. Banerjee, D. Kastha, S. Das, G. Vivek, Celso Grebogi: Robust chaos - the theoretical formulation and experimental evidence. ISCAS (5) 1999: 293-296
5EES. Das: Elements Of Artificial Neural Networks [Book Reviews]. IEEE Transactions on Neural Networks 9(1): 234-235 (1998)
4EES. Mitra, S. Das, Parimal Pal Chaudhuri, S. Nandi: Architecture of a VLSI Chip for Modeling Amino Acid Sequence in Proteins. VLSI Design 1996: 316-317
3EEBabu Thomas, B. Yegnanarayana, S. Das: Stereo-correspondence using Gabor logons and neural networks. ICIP 1995: 2386-2389
2EES. Das, Sanjeev Saxena: Parallel algorithms for single row routing in narrow streets. VLSI Design 1995: 13-18
1EES. Das, M. Sen: An interval digraph in relation to its associated bipartite graph. Discrete Mathematics 122(1-3): 113-136 (1993)

Coauthor Index

1Behnaam Aazhang [9]
2S. Banerjee [6]
3K. Biswas [10] [11] [12]
4Joseph R. Cavallaro [9]
5R.-S. Chang [7]
6Parimal Pal Chaudhuri [4]
7Lokenath Debnath [8]
8Elza Erkip [9]
9Celso Grebogi [6]
10Tao He [14]
11S. Kal [10] [11] [12]
12D. Kastha [6]
13Valeriy Kolesnikov [15]
14S. K. Lahiri [11] [12]
15Chuang Lin [14]
16D. K. Maurya [11] [12]
17S. Mitra [4]
18S. Nandi [4]
19Fengyuan Ren [14]
20A. Ravi Sankar [12]
21Sanjeev Saxena [2]
22M. Sen [1]
23Jang-Ping Sheu [7]
24Gurdip Singh [15]
25Babu Thomas [3]
26Yu-Chee Tseng [7]
27H. Viswanathan [13]
28G. Vivek [6]
29B. Yegnanarayana [3]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)