2007 |
20 | | Sio Iong Ao,
Oscar Castillo,
Craig Douglas,
David Dagan Feng,
Jeong-A. Lee:
Proceedings of the International MultiConference of Engineers and Computer Scientists 2007, IMECS 2007, March 21-23, 2007, Hong Kong, China
Newswood Limited 2007 |
19 | EE | Jeong-Gun Lee,
Jeong-A. Lee,
Byeong-Seok Lee,
Milos D. Ercegovac:
A Design Method for Heterogeneous Adders.
ICESS 2007: 121-132 |
18 | EE | Eun-Gu Jung,
Jeong-Gun Lee,
Kyoung-Son Jhang,
Jeong-A. Lee,
Dong-Soo Har:
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions.
VLSI Signal Processing 46(2-3): 133-151 (2007) |
2006 |
17 | | Sio Iong Ao,
Jeong-A. Lee,
Oscar Castillo,
Pranay Chaudhuri,
David Dagan Feng:
Proceedings of the International MultiConference of Engineers and Computer Scientists 2006, IMECS '06, June 20-22, 2006, Hong Kong, China
Newswood Limited 2006 |
2005 |
16 | EE | Eun-Gu Jung,
Jeong-Gun Lee,
Sang-Hoon Kwak,
Kyoung-Sun Jhang,
Jeong-A. Lee,
Dong-Soo Har:
High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion.
ACM Great Lakes Symposium on VLSI 2005: 152-155 |
15 | EE | Eun-Gu Jung,
Eon-Pyo Hong,
Kyoung-Son Jhang,
Jeong-A. Lee,
Dong-Soo Har:
Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs.
PCM (1) 2005: 500-511 |
14 | EE | Jeong-Gun Lee,
Suk-Jin Kim,
Jeong-A. Lee,
Kiseon Kim:
A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme.
IEICE Transactions 88-A(4): 1031-1037 (2005) |
13 | EE | Eun-Gu Jung,
Jeong-Gun Lee,
Sang-Hoon Kwak,
Kyoung-Son Jhang,
Jeong-A. Lee,
Dong-Soo Har:
Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion.
IEICE Transactions 88-C(12): 2395-2399 (2005) |
12 | EE | Jeong-Gun Lee,
Jeong-A. Lee,
Suk-Jin Kim,
Kiseon Kim:
Design of a Mutated Adder and Its Optimization Using ILP Formulation.
IEICE Transactions 88-D(7): 1506-1508 (2005) |
2004 |
11 | EE | Seong-Yong Ahn,
Jun-Yong Kim,
Jeong-A. Lee:
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System.
Asia-Pacific Computer Systems Architecture Conference 2004: 102-114 |
10 | EE | Byung-Soo Choi,
Jeong-A. Lee,
Dong-Soo Har:
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption.
Asia-Pacific Computer Systems Architecture Conference 2004: 170-184 |
9 | EE | Jeong-Gun Lee,
Euiseok Kim,
Jeong-A. Lee,
Eunok Paek:
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization.
Asia-Pacific Computer Systems Architecture Conference 2004: 582-595 |
8 | EE | Dong-Hoon Yoo,
Dong-Ik Lee,
Jeong-A. Lee:
Operation Net System: A Formal Design Representation Model for High-Level Synthesis of Asynchronous Systems Based on Transformations.
ICATPN 2004: 435-453 |
2003 |
7 | | Seong-Yong Ahn,
Yo-Seop Hwang,
Jae-Hong Shim,
Jeong-A. Lee:
Producer and Consumer: Roles of a Microprocessor and a Configurable Logic in a Configurable SoC.
Engineering of Reconfigurable Systems and Algorithms 2003: 325- |
6 | EE | Sangman Moh,
Jae-Hong Shim,
Yang-Dong Lee,
Jeong-A. Lee,
Beom-Joon Cho:
Design and Evaluation of a Cache Coherence Adapter for the SMP Nodes Interconnected via Xcent-Net.
ISCIS 2003: 908-915 |
2000 |
5 | EE | Kees-Jan Van der Kolk,
Jeong-A. Lee,
Ed F. Deprettere:
A Floating Point Vectoring Algorithm Based on Fast Rotations.
VLSI Signal Processing 25(2): 125-139 (2000) |
4 | EE | Gerben J. Hekstra,
Ed F. Deprettere,
Jeong-A. Lee:
Guest Editor's Introduction.
VLSI Signal Processing 25(2): 99-100 (2000) |
1999 |
3 | EE | Kees-Jan Van der Kolk,
Ed F. Deprettere,
Jeong-A. Lee:
A Floating Point Vectoring Algorithm Based on Fast Rotations.
EUROMICRO 1999: 1140- |
1992 |
2 | | Jeong-A. Lee,
Tomás Lang:
Constant-Factor Redundant CORDIC for Angle Calculation and Rotation.
IEEE Trans. Computers 41(8): 1016-1025 (1992) |
1991 |
1 | | John A. Harding,
Tomás Lang,
Jeong-A. Lee:
A Comparison of Redundant CORDIC Rotation Engines.
ICCD 1991: 556-559 |