Dong-Soo Har

2007
12	EE	Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. VLSI Signal Processing 46(2-3): 133-151 (2007)
2005
11	EE	Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Sun Jhang, Jeong-A. Lee, Dong-Soo Har: High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. ACM Great Lakes Symposium on VLSI 2005: 152-155
10	EE	Fahad Mujahid, Eun-Gu Jung, Dong-Soo Har, Jun-Hee Hong, Hoi-Jeong Lim: High Speed JPEG Coder Based on Modularized and Pipelined Architecture with Distributed Control. PCM (1) 2005: 466-476
9	EE	Eun-Gu Jung, Eon-Pyo Hong, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs. PCM (1) 2005: 500-511
8	EE	Min-Chang Kang, Eun-Gu Jung, Dong-Soo Har: Design of an Asynchronous Switch Based on Butterfly Fat-Tree for Network-on-Chip Applications. PCM (2) 2005: 538-549
7	EE	Dong-Wook Lee, Dong-Soo Har: An Area Efficient Approach to Design Self-Timed Cryptosystems Combatting DPA Attack. IEICE Transactions 88-A(1): 331-333 (2005)
6	EE	Myeong-Hoon Oh, Dong-Soo Har: Low Delay-Power Product Current-Mode Multiple Valued Logic for Delay-Insensitive Data Transfer Mechanism. IEICE Transactions 88-A(5): 1379-1383 (2005)
5	EE	Eun-Gu Jung, Dong-Soo Har: Asynchronous Reorder Buffer for Asynchronous On-Chip Bus. IEICE Transactions 88-C(12): 2391-2394 (2005)
4	EE	Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion. IEICE Transactions 88-C(12): 2395-2399 (2005)
3	EE	Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har: Differential Value Encoding for Delay Insensitive Handshake Protocol. IEICE Transactions 88-D(7): 1437-1444 (2005)
2004
2	EE	Byung-Soo Choi, Jeong-A. Lee, Dong-Soo Har: High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption. Asia-Pacific Computer Systems Architecture Conference 2004: 170-184
1	EE	Myeong-Hoon Oh, Dong-Soo Har: A Novel Mechanism for Delay-Insensitive Data Transfer Based on Current-Mode Multiple Valued Logic. PATMOS 2004: 691-700

Coauthor Index

1	Byung-Soo Choi	[2]
2	Eon-Pyo Hong	[9]
3	Jun-Hee Hong	[10]
4	Kyoung-Son Jhang	[4] [9] [12]
5	Kyoung-Sun Jhang	[3] [11]
6	Eun-Gu Jung	[3] [4] [5] [8] [9] [10] [11] [12]
7	Min-Chang Kang	[8]
8	Sang-Hoon Kwak	[4] [11]
9	Dong-Wook Lee	[7]
10	Jeong-A. Lee	[2] [4] [9] [11] [12]
11	Jeong-Gun Lee	[3] [4] [11] [12]
12	Hoi-Jeong Lim	[10]
13	Fahad Mujahid	[10]
14	Myeong-Hoon Oh	[1] [6]

Colors in the list of coauthors