2008 |
21 | EE | Aseem Gupta,
Nikil D. Dutt,
Fadi J. Kurdahi,
Kamal S. Khouri,
Magdy S. Abadir:
Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability.
ISQED 2008: 470-475 |
2007 |
20 | EE | Aseem Gupta,
Nikil D. Dutt,
Fadi J. Kurdahi,
Kamal S. Khouri,
Magdy S. Abadir:
LEAF: A System Level Leakage-Aware Floorplanner for SoCs.
ASP-DAC 2007: 274-279 |
19 | EE | Aseem Gupta,
Nikil D. Dutt,
Fadi J. Kurdahi,
Kamal S. Khouri,
Magdy S. Abadir:
STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs.
VLSI Design 2007: 559-564 |
2006 |
18 | EE | Aseem Gupta,
Nikil D. Dutt,
Fadi J. Kurdahi,
Kamal S. Khouri,
Magdy S. Abadir:
Floorplan driven leakage power aware IP-based SoC design space exploration.
CODES+ISSS 2006: 118-123 |
2005 |
17 | EE | Kamal S. Khouri,
Ganesh Lakshminarayana,
Niraj K. Jha:
Memory binding for performance optimization of control-flow intensive behavioral descriptions.
IEEE Trans. VLSI Syst. 13(5): 513-524 (2005) |
2004 |
16 | EE | Mahesh Mamidipaka,
Kamal S. Khouri,
Nikil D. Dutt,
Magdy S. Abadir:
Analytical models for leakage power estimation of memory array structures.
CODES+ISSS 2004: 146-151 |
15 | EE | Ganesh Lakshminarayana,
Anand Raghunathan,
Kamal S. Khouri,
Niraj K. Jha,
Sujit Dey:
Common-case computation: a high-level energy and performance optimization technique.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 33-49 (2004) |
14 | EE | Mahesh Mamidipaka,
Kamal S. Khouri,
Nikil D. Dutt,
Magdy S. Abadir:
IDAP: a tool for high-level power estimation of custom array structures.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1361-1369 (2004) |
2003 |
13 | EE | Mahesh Mamidipaka,
Kamal S. Khouri,
Nikil D. Dutt,
Magdy S. Abadir:
IDAP: A Tool for High Level Power Estimation of Custom Array Structures.
ICCAD 2003: 113-119 |
12 | EE | Mahesh Mamidipaka,
Nikil D. Dutt,
Kamal S. Khouri:
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures.
VLSI Design 2003: 320- |
2002 |
11 | EE | Kamal S. Khouri,
Niraj K. Jha:
Leakage power analysis and reduction during behavioral synthesis.
IEEE Trans. VLSI Syst. 10(6): 876-885 (2002) |
2001 |
10 | EE | Kamal S. Khouri,
Niraj K. Jha:
Clock selection for performance optimization of control-flowintensive behaviors.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 158-165 (2001) |
2000 |
9 | EE | Kamal S. Khouri,
Niraj K. Jha:
Leakage Power Analysis and Reduction during Behavioral Synthesis.
ICCD 2000: 561-564 |
8 | EE | Kamal S. Khouri,
Niraj K. Jha:
Clock Selection for Performance Optimization of Control-Flow Intensive Behaviors.
VLSI Design 2000: 523-529 |
1999 |
7 | EE | Ganesh Lakshminarayana,
Anand Raghunathan,
Kamal S. Khouri,
Niraj K. Jha,
Sujit Dey:
Common-Case Computation: A High-Level Technique for Power and Performance Optimization.
DAC 1999: 56-61 |
6 | EE | Kamal S. Khouri,
Ganesh Lakshminarayana,
Niraj K. Jha:
Memory binding for performance optimization of control-flow intensive behaviors.
ICCAD 1999: 482-488 |
5 | EE | Kamal S. Khouri,
Ganesh Lakshminarayana,
Niraj K. Jha:
High-level synthesis of low-power control-flow intensive circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(12): 1715-1729 (1999) |
4 | EE | Ganesh Lakshminarayana,
Kamal S. Khouri,
Niraj K. Jha:
Wavesched: a novel scheduling technique for control-flow intensive designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(5): 505-523 (1999) |
1998 |
3 | EE | Kamal S. Khouri,
Ganesh Lakshminarayana,
Niraj K. Jha:
IMPACT: A High-Level Synthesis System for Low Power Control-Flow Intensive Circuits.
DATE 1998: 848-854 |
2 | EE | Kamal S. Khouri,
Ganesh Lakshminarayana,
Niraj K. Jha:
Fast high-level power estimation for control-flow intensive design.
ISLPED 1998: 299-304 |
1997 |
1 | EE | Ganesh Lakshminarayana,
Kamal S. Khouri,
Niraj K. Jha:
Wavesched: a novel scheduling technique for control-flow intensive behavioral descriptions.
ICCAD 1997: 244-250 |