dblp.uni-trier.dewww.uni-trier.de

Mahesh Mamidipaka

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2004
9EEMahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt, Magdy S. Abadir: Analytical models for leakage power estimation of memory array structures. CODES+ISSS 2004: 146-151
8EEPrabhat Mishra, Mahesh Mamidipaka, Nikil Dutt: Processor-memory coexploration using an architecture description language. ACM Trans. Embedded Comput. Syst. 3(1): 140-162 (2004)
7EEMahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt, Magdy S. Abadir: IDAP: a tool for high-level power estimation of custom array structures. IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1361-1369 (2004)
2003
6EEMahesh Mamidipaka, Nikil D. Dutt: On-chip Stack Based Memory Organization for Low Power Embedded Architectures. DATE 2003: 11082-11089
5EEMahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt, Magdy S. Abadir: IDAP: A Tool for High Level Power Estimation of Custom Array Structures. ICCAD 2003: 113-119
4EEMahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri: A Methodology for Accurate Modeling of Energy Dissipation in Array Structures. VLSI Design 2003: 320-
3EEMahesh Mamidipaka, Daniel S. Hirschberg, Nikil D. Dutt: Adaptive low-power address encoding techniques using self-organizing lists. IEEE Trans. VLSI Syst. 11(5): 827-834 (2003)
2002
2EENikil D. Dutt, Daniel S. Hirschberg, Mahesh Mamidipaka: Efficient Power Reduction Techniques for Time Multiplexed Address Buses. ISSS 2002: 207-212
2001
1EEMahesh Mamidipaka, Daniel S. Hirschberg, Nikil Dutt: Low power address encoding using self-organizing lists. ISLPED 2001: 188-193

Coauthor Index

1Magdy S. Abadir [5] [7] [9]
2Nikil D. Dutt (Nikil Dutt) [1] [2] [3] [4] [5] [6] [7] [8] [9]
3Daniel S. Hirschberg [1] [2] [3]
4Kamal S. Khouri [4] [5] [7] [9]
5Prabhat Mishra [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)