| 2008 |
|---|
| 8 | EE | Jaan Raik,
Uljana Reinsalu,
Raimund Ubar,
Maksim Jenihhin,
Peeter Ellervee:
Code Coverage Analysis using High-Level Decision Diagrams.
DDECS 2008: 201-206 |
| 7 | EE | Raimund Ubar,
Sergei Devadze,
Maksim Jenihhin,
Jaan Raik,
Gert Jervan,
Peeter Ellervee:
Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance.
DELTA 2008: 222-227 |
| 6 | EE | Jaan Raik,
Raimund Ubar,
Taavi Viilukas,
Maksim Jenihhin:
Mixed hierarchical-functional fault models for targeting sequential cores.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 465-477 (2008) |
| 2007 |
|---|
| 5 | | Maksim Jenihhin,
Jaan Raik,
Raimund Ubar,
Witold A. Pleskacz,
Michal Rakowski:
Layout to Logic Defect Analysis for Hierarchical Test Generation.
DDECS 2007: 35-40 |
| 2006 |
|---|
| 4 | EE | Gert Jervan,
Petru Eles,
Zebo Peng,
Raimund Ubar,
Maksim Jenihhin:
Test Time Minimization for Hybrid BIST of Core-Based Systems.
J. Comput. Sci. Technol. 21(6): 907-912 (2006) |
| 2004 |
|---|
| 3 | EE | Raimund Ubar,
Maksim Jenihhin:
Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting.
DELTA 2004: 3-8 |
| 2003 |
|---|
| 2 | EE | Gert Jervan,
Petru Eles,
Zebo Peng,
Raimund Ubar,
Maksim Jenihhin:
Test Time Minimization for Hybrid BIST of Core-Based Systems.
Asian Test Symposium 2003: 318-325 |
| 1 | EE | Gert Jervan,
Petru Eles,
Zebo Peng,
Raimund Ubar,
Maksim Jenihhin:
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture.
DFT 2003: 225- |
