2007 | ||
---|---|---|
1 | Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A. Pleskacz, Michal Rakowski: Layout to Logic Defect Analysis for Hierarchical Test Generation. DDECS 2007: 35-40 |
1 | Maksim Jenihhin | [1] |
2 | Witold A. Pleskacz | [1] |
3 | Jaan Raik | [1] |
4 | Raimund Ubar | [1] |