| 2007 |
|---|
| 16 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
On Designs of Radix Converters Using Arithmetic Decompositions--Binary to Decimal Converters--.
ISMVL 2007: 32 |
| 15 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
Design Methods of Radix Converters Using Arithmetic Decompositions.
IEICE Transactions 90-D(6): 905-914 (2007) |
| 2006 |
|---|
| 14 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
On Designs of Radix Converters Using Arithmetic Decompositions.
ISMVL 2006: 3 |
| 13 | EE | Hui Qin,
Tsutomu Sasao,
Yukihiro Iguchi:
A Design of AES Encryption Circuit with 128-bit Keys Using Look-Up Table Ring on FPGA.
IEICE Transactions 89-D(3): 1139-1147 (2006) |
| 2005 |
|---|
| 12 | EE | Hui Qin,
Tsutomu Sasao,
Yukihiro Iguchi:
An FPGA design of AES encryption circuit with 128-bit keys.
ACM Great Lakes Symposium on VLSI 2005: 147-151 |
| 11 | EE | Tsutomu Sasao,
Yukihiro Iguchi,
Takahiro Suzuki:
On LUT Cascade Realizations of FIR Filters.
DSD 2005: 467-475 |
| 10 | EE | Yukihiro Iguchi,
Tsutomu Sasao:
Hardware to Compute Walsh Coefficients.
ISMVL 2005: 75-81 |
| 2004 |
|---|
| 9 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
A Method to Evaluate Logic Functions in the Presence of Unknown Inputs Using LUT Cascades.
ISMVL 2004: 302-308 |
| 2002 |
|---|
| 8 | EE | Atsumu Iseno,
Yukihiro Iguchi:
A Method for Storing Fail Bit Maps in Burn-in Memory Testers.
DELTA 2002: 142-148 |
| 7 | EE | Shinobu Nagayama,
Tsutomu Sasao,
Yukihiro Iguchi,
Munehiro Matsuura:
Representations of Logic Functions Using QRMDDs.
ISMVL 2002: 261- |
| 6 | | Tsutomu Sasao,
Yukihiro Iguchi,
Munehiro Matsuura:
Comparison of Decision Diagrams for Multiple-Output Logic Functions.
IWLS 2002: 379-384 |
| 2001 |
|---|
| 5 | | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
Realization of Multiple-Output Functions by Reconfigurable Cascades.
ICCD 2001: 388-393 |
| 2000 |
|---|
| 4 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura,
Atsumu Iseno:
A hardware simulation engine based on decision diagrams (short paper).
ASP-DAC 2000: 73-76 |
| 3 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
Implementation of Multiple-Output Functions Using PQMDDs.
ISMVL 2000: 199-205 |
| 1999 |
|---|
| 2 | EE | Yukihiro Iguchi,
Munehiro Matsuura,
Tsutomu Sasao,
Atsumu Iseno:
Realization of Regular Ternary Logic Functions.
ASP-DAC 1999: 331- |
| 1997 |
|---|
| 1 | EE | Yukihiro Iguchi,
Tsutomu Sasao,
Munehiro Matsuura:
On Decomposition of Kleene TDDs.
Asian Test Symposium 1997: 234- |
