Alireza Hodjat

2007
15	EE	Alireza Hodjat, Lejla Batina, David Hwang, Ingrid Verbauwhede: HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. Integration 40(1): 45-51 (2007)
2006
14	EE	Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede: Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. FPL 2006: 1-4
13	EE	Alireza Hodjat, Ingrid Verbauwhede: Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors. IEEE Trans. Computers 55(4): 366-372 (2006)
2005
12	EE	Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede: A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology. ACM Great Lakes Symposium on VLSI 2005: 60-63
11	EE	Lejla Batina, David Hwang, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede: Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. CHES 2005: 106-118
10	EE	Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. CHES 2005: 354-365
9	EE	Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. DAC 2005: 222-227
8	EE	Alireza Hodjat, David Hwang, Ingrid Verbauwhede: A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks. ITCC (1) 2005: 538-543
2004
7	EE	Alireza Hodjat, Ingrid Verbauwhede: A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA. FCCM 2004: 308-309
6	EE	Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, Ingrid Verbauwhede: Embedded Software Integration for Coarse-Grain Reconfigurable Systems. IPDPS 2004
5	EE	Alireza Hodjat, Ingrid Verbauwhede: Minimum Area Cost for a 30 to 70 Gbits/s AES Processor. ISVLSI 2004: 83-88
4	EE	Alireza Hodjat, Patrick Schaumont, Ingrid Verbauwhede: Architectural Design Features of a Programmable High Throughput AES Coprocessor. ITCC (2) 2004: 498-502
3	EE	Herwin Chan, Alireza Hodjat, Jun Shi, Richard D. Wesel, Ingrid Verbauwhede: Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network. ITCC (2) 2004: 578-582
2	EE	Alireza Hodjat, Ingrid Verbauwhede: High-Throughput Programmable Cryptocoprocessor. IEEE Micro 24(3): 34-45 (2004)
2003
1	EE	David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede: Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system. DAC 2003: 60-65

Coauthor Index

1	Lejla Batina	[11] [14] [15]
2	Herwin Chan	[3]
3	Yi Fan	[1]
4	David Hwang	[1] [8] [9] [10] [11] [12] [14] [15]
5	Bo-Cheng Lai (Bo-Cheng Charles Lai)	[1] [9] [10] [12]
6	Bart Preneel	[11]
7	Kazuo Sakiyama	[1] [6] [14]
8	Patrick Schaumont	[1] [4] [6] [9] [10]
9	Jun Shi	[3]
10	Kris Tiri	[9] [10] [12]
11	Ingrid Verbauwhede	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
12	Richard D. Wesel	[3]
13	Shenglin Yang	[1] [9] [10]