Warren J. Gross

2008
16	EE	Andrew J. Wong, Warren J. Gross: Configurable Flow Models for FPGA Particle Graphics Engines. FCCM 2008: 283-284
15	EE	Yousef El-Kurdi, David Fernández, Evgueni Souleimanov, Dennis Giannacopoulos, Warren J. Gross: FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method. Computer Physics Communications 178(8): 558-570 (2008)
14	EE	Shaoqiang Bi, Warren J. Gross: The Mixed-Radix Chinese Remainder Theorem and Its Applications to Residue Comparison. IEEE Trans. Computers 57(12): 1624-1632 (2008)
13	EE	John Sachs Beeckler, Warren J. Gross: Particle graphics on reconfigurable hardware. TRETS 1(3): (2008)
2007
12	EE	Jahyun J. Koo, David Fernández, Ashraf Haddad, Warren J. Gross: Evaluation of a High-Level-Language Methodology for High-Performance Reconfigurable Computers. ASAP 2007: 30-35
11	EE	Jahyun J. Koo, Alan Evans, Warren J. Gross: Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer. FPL 2007: 11-16
10	EE	Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gross: Survey of Stochastic Computation on Factor Graphs. ISMVL 2007: 54
9	EE	Laurier Boulianne, Michel Dumontier, Warren J. Gross: A stochastic particle-based biological system simulator. SCSC 2007: 794-801
8	EE	Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak: Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 15(3): 309-318 (2007)
2006
7	EE	Yousef El-Kurdi, Warren J. Gross, Dennis Giannacopoulos: Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs. FCCM 2006: 293-294
6	EE	Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(6): 1143 (2006)
5	EE	Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(7): 1224-1234 (2006)
2005
4	EE	John Sachs Beeckler, Warren J. Gross: FPGA Particle Graphics Hardware. FCCM 2005: 85-94
3	EE	Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy: An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction. IWSOC 2005: 396-399
2	EE	Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. VLSI Signal Processing 39(1-2): 93-111 (2005)
2004
1	EE	Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak: An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding. FCCM 2004: 310-311

Coauthor Index

1	Asim J. Al-Khalili (A. J. Al-Khalili)	[3]
2	John Sachs Beeckler	[4] [13]
3	Shaoqiang Bi	[3] [14]
4	Laurier Boulianne	[9]
5	Michel Dumontier	[9]
6	Yousef El-Kurdi	[7] [15]
7	Alan Evans	[11]
8	David Fernández	[12] [15]
9	Dennis Giannacopoulos	[7] [15]
10	P. Glenn Gulak	[1] [2] [5] [6] [8]
11	Ashraf Haddad	[12]
12	Ralf Koetter (Ralf Kötter)	[2] [5] [6]
13	Jahyun J. Koo	[11] [12]
14	Frank R. Kschischang	[1] [2] [5] [6] [8]
15	Shie Mannor	[10]
16	Evgueni Souleimanov	[15]
17	M. N. S. Swamy	[3]
18	Saeed Sharifi Tehrani	[10]
19	Wei Wang	[3]
20	Andrew J. Wong	[16]

Colors in the list of coauthors