Wei Wang

Purdue University Indianapolis

other persons with the same name:

• Wei Wang - ThinkIT Speech Lab, Institute of Acoustics, Chinese Academy of Sciences
• Wei Wang - National University of Singapore
• Wei Wang - Language Weaver, Inc.
• Wei Wang - Center for Engineering and Scientific Computation, Zhejiang University, China
• Wei Wang - University of North Carolina at Chapel Hill
• Wei Wang - School of Life Science, Fudan University, China
• Wei Wang - Nonlinear Systems Laboratory, Department of Mechanical Engineering, MIT

2005
8	EE	Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy: An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction. IWSOC 2005: 396-399
7	EE	Wei Wang, Xiaolin Zhang, Chenyang Yang, M. N. S. Swamy, M. Omair Ahmad: RRNS Quasi-Chaotic Coding and Its FPGA Implementation. SNPD 2005: 274-280
2004
6		Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili: Modulo deflation in (2n+1, 2n, 2n-1) converters. ISCAS (2) 2004: 429-432
5	EE	Wei Wang, M. N. S. Swamy, M. Omair Ahmad: RNS Application for Digital Image Processing. IWSOC 2004: 77-80
4	EE	Wei Wang, M. N. S. Swamy, M. Omair Ahmad: Novel Design and Fpga Implementation of Da-rns Fir Filters. Journal of Circuits, Systems, and Computers 13(6): 1233-1250 (2004)
2003
3	EE	Wei Wang, M. N. S. Swamy, M. Omair Ahmad: Moduli selection in RNS for efficient VLSI implementation. ISCAS (4) 2003: 512-515
2002
2	EE	Wei Wang, M. N. S. Swamy, M. Omair Ahmad: A new architecture of RRNS error-correcting QC encoder/decoder and its FPGA implementation. ISCAS (5) 2002: 813-816
1999
1	EE	Wei Wang, M. N. S. Swamy, M. Omair Ahmad, Yuke Wang: A high-speed residue-to-binary converter and a scheme for its VLSI implementation. ISCAS (6) 1999: 330-333

Coauthor Index

1	M. Omair Ahmad	[1] [2] [3] [4] [5] [7]
2	Asim J. Al-Khalili (A. J. Al-Khalili)	[6] [8]
3	Shaoqiang Bi	[6] [8]
4	Warren J. Gross	[8]
5	M. N. S. Swamy	[1] [2] [3] [4] [5] [7] [8]
6	Yuke Wang	[1]
7	Chenyang Yang	[7]
8	Xiaolin Zhang	[7]