2001 |
12 | EE | Sujatha Sundararaman,
Sriram Govindarajan,
Ranga Vemuri:
Application Specific Macro Based Synthesis.
VLSI Design 2001: 317- |
11 | | Naren Narasimhan,
Elena Teica,
Rajesh Radhakrishnan,
Sriram Govindarajan,
Ranga Vemuri:
Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis.
Formal Methods in System Design 19(3): 237-273 (2001) |
2000 |
10 | EE | Sriram Govindarajan,
Ranga Vemuri:
Improving the Schedule Quality of Static-List Time-Constrained Scheduling.
DATE 2000: 749 |
9 | EE | Sriram Govindarajan,
Ranga Vemuri:
Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS.
FPL 2000: 7-18 |
8 | EE | Preetham Lakshmikanthan,
Sriram Govindarajan,
Vinoo Srinivasan,
Ranga Vemuri:
Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints.
IPDPS Workshops 2000: 924-931 |
7 | EE | Sriram Govindarajan,
Vinoo Srinivasan,
Preetham Lakshmikanthan,
Ranga Vemuri:
A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures.
VLSI Design 2000: 212-219 |
1999 |
6 | EE | Meenakshi Kaul,
Ranga Vemuri,
Sriram Govindarajan,
Iyad Ouaiss:
An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications.
DAC 1999: 616-622 |
1998 |
5 | EE | Sriram Govindarajan,
Iyad Ouaiss,
Meenakshi Kaul,
Vinoo Srinivasan,
Ranga Vemuri:
An Effective Design System for Dynamically Reconfigurable Architectures.
FCCM 1998: 312-313 |
4 | | Iyad Ouaiss,
Sriram Govindarajan,
Vinoo Srinivasan,
Meenakshi Kaul,
Ranga Vemuri:
An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures.
IPPS/SPDP Workshops 1998: 31-36 |
1997 |
3 | EE | Sriram Govindarajan,
Ranga Vemuri:
Cone-based clustering heuristic for list-scheduling algorithms.
ED&TC 1997: 456-462 |
2 | | Sriram Govindarajan,
Ranga Vemuri:
Dynamic Bounding of Successor Force Computations in the Force Directed List Scheduling Algorithms.
ICCD 1997: 752-757 |
1996 |
1 | EE | Naren Narasimhan,
Vinoo Srinivasan,
Madhavi Vootukuru,
Jeffrey Walrath,
Sriram Govindarajan,
Ranga Vemuri:
Rapid Prototyping of Reconfigurable Coprocessors.
ASAP 1996: 303-312 |