2008 |
8 | EE | Ed Grochowski,
Murali Annavaram,
Paul Reed:
Implications of device timing variability on full chip timing.
ISPD 2008: 68 |
7 | EE | Larry Seiler,
Doug Carmean,
Eric Sprangle,
Tom Forsyth,
Michael Abrash,
Pradeep Dubey,
Stephen Junkins,
Adam Lake,
Jeremy Sugerman,
Robert Cavin,
Roger Espasa,
Ed Grochowski,
Toni Juan,
Pat Hanrahan:
Larrabee: a many-core x86 architecture for visual computing.
ACM Trans. Graph. 27(3): (2008) |
2007 |
6 | EE | Murali Annavaram,
Ed Grochowski,
Paul Reed:
Implications of Device Timing Variability on Full Chip Timing.
HPCA 2007: 37-45 |
2005 |
5 | EE | Murali Annavaram,
Ed Grochowski,
John Paul Shen:
Mitigating Amdahl's Law through EPI Throttling.
ISCA 2005: 298-309 |
2004 |
4 | EE | Ed Grochowski,
Ronny Ronen,
John Paul Shen,
Hong Wang:
Best of Both Latency and Throughput.
ICCD 2004: 236-243 |
2003 |
3 | EE | Ed Grochowski,
David Ayers,
Vivek Tiwari:
Microarchitectural dI/dt Control.
IEEE Design & Test of Computers 20(3): 40-47 (2003) |
2002 |
2 | EE | Perry H. Wang,
Hong Wang,
Jamison D. Collins,
Ed Grochowski,
Ralph-Michael Kling,
John Paul Shen:
Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.
HPCA 2002: 187-196 |
1 | EE | Ed Grochowski,
David Ayers,
Vivek Tiwari:
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation.
HPCA 2002: 7-16 |