2007 |
11 | | Saibal Mukhopadhyay,
Qikai Chen,
Kaushik Roy:
Memories in Scaled Technologies: A Review of Process Induced Failures, Test Methodologies, and Fault Tolerance.
DDECS 2007: 69-74 |
10 | EE | Qikai Chen,
Arjun Guha,
Kaushik Roy:
An Accurate Analytical SNM Modeling Technique for SRAMs Based on Butterworth Filter Function.
VLSI Design 2007: 615-620 |
2006 |
9 | EE | Qikai Chen,
Saibal Mukhopadhyay,
Aditya Bansal,
Kaushik Roy:
Circuit-aware device design methodology for nanometer technologies: a case study for low power SRAM design.
DATE 2006: 983-988 |
8 | EE | Arijit Raychowdhury,
Xuanyao Fong,
Qikai Chen,
Kaushik Roy:
Analysis of super cut-off transistors for ultralow power digital logic circuits.
ISLPED 2006: 2-7 |
7 | EE | Qikai Chen,
Mesut Meterelliyoz,
Kaushik Roy:
A CMOS Thermal Sensor and Its Applications in Temperature Adaptive Design.
ISQED 2006: 243-248 |
2005 |
6 | EE | Matthew Cooke,
Hamid Mahmoodi-Meimand,
Qikai Chen,
Kaushik Roy:
Energy recovery clocked dynamic logic.
ACM Great Lakes Symposium on VLSI 2005: 468-471 |
5 | EE | Swarup Bhunia,
Nilanjan Banerjee,
Qikai Chen,
Hamid Mahmoodi-Meimand,
Kaushik Roy:
A novel synthesis approach for active leakage power reduction using dynamic supply gating.
DAC 2005: 479-484 |
4 | EE | Patrick Ndai,
Amit Agarwal,
Qikai Chen,
Kaushik Roy:
A Soft Error Monitor Using Switching Current Detection.
ICCD 2005: 185-192 |
3 | EE | Qikai Chen,
Saibal Mukhopadhyay,
Hamid Mahmoodi,
Kaushik Roy:
Process Variation Tolerant Online Current Monitor for Robust Systems.
IOLTS 2005: 171-176 |
2 | EE | Qikai Chen,
Hamid Mahmoodi-Meimand,
Swarup Bhunia,
Kaushik Roy:
Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS.
VTS 2005: 292-297 |
1 | EE | Qikai Chen,
Hamid Mahmoodi-Meimand,
Swarup Bhunia,
Kaushik Roy:
Efficient testing of SRAM with optimized march sequences and a novel DFT technique for emerging failures due to process variations.
IEEE Trans. VLSI Syst. 13(11): 1286-1295 (2005) |