| 2001 |
|---|
| 13 | EE | Geng Bai,
Sudhakar Bobba,
Ibrahim N. Hajj:
Static Timing Analysis Including Power Supply Noise Effect on Propagation Delay in VLSI Circuits.
DAC 2001: 295-300 |
| 12 | EE | Sudhakar Bobba,
Tyler Thorp,
Kathirgamar Aingaran,
Dean Liu:
IC Power Distribution Challenges.
ICCAD 2001: 643-650 |
| 11 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
Input vector generation for maximum intrinsic decoupling capacitance of VLSI circuits.
ISCAS (5) 2001: 195-198 |
| 10 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
Maximum voltage variation in the power distribution network of VLSI circuits with RLC models.
ISLPED 2001: 376-381 |
| 9 | EE | Geng Bai,
Sudhakar Bobba,
Ibrahim N. Hajj:
RC Power Bus Maximum Voltage Drop in Digital VLSI Circuits.
ISQED 2001: 205-210 |
| 8 | EE | Geng Bai,
Sudhakar Bobba,
Ibrahim N. Hajj:
RC Power Bus Maximum Voltage Drop in Digital VLSI Circuits.
ISQED 2001: 257- |
| 2000 |
|---|
| 7 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
High-performance bidirectional repeaters.
ACM Great Lakes Symposium on VLSI 2000: 53-58 |
| 6 | | Geng Bai,
Sudhakar Bobba,
Ibrahim N. Hajj:
Simulation and Optimization of the Power Distribution Network in VLSI Circuits.
ICCAD 2000: 481-486 |
| 5 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
Current-Mode Threshold Logic Gates.
ICCD 2000: 235-240 |
| 4 | EE | Geng Bai,
Sudhakar Bobba,
Ibrahim N. Hajj:
Power Bus Maximum Voltage Drop in Digital VLSI Circuits.
ISQED 2000: 263-268 |
| 1999 |
|---|
| 3 | EE | Sudhakar Bobba,
Ibrahim N. Hajj,
Naresh R. Shanbhag:
Analytical Expressions for Power Dissipation of Macro-blocks in DSP Architectures.
VLSI Design 1999: 358- |
| 1998 |
|---|
| 2 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
Maximum Current Estimation in Programmable Logic Arrays.
Great Lakes Symposium on VLSI 1998: 301-306 |
| 1 | EE | Sudhakar Bobba,
Ibrahim N. Hajj:
Estimation of maximum current envelope for power bus analysis and design.
ISPD 1998: 141-146 |
