Dan Bailey

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2EEDan Bailey, Eric Soenen, Puneet Gupta, Paul G. Villarrubia, Sang H. Dhong: Challenges at 45nm and beyond. ICCAD 2008: 7
1EEJoel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah, Emily Shriver, Shi-Huang Yin, Shannon V. Morton: Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU. ACM Great Lakes Symposium on VLSI 2002: 1-6

Coauthor Index

1David Bertucci [1]
2Gabriel P. Bischoff [1]
3Daniel E. Dever [1]
4Sang H. Dhong [2]
5Mike Gowan [1]
6Joel Grodstein [1]
7Puneet Gupta [2]
8Roy Lane [1]
9Brian Lilly [1]
10Sue Lowell [1]
11Shannon V. Morton [1]
12Krishna Nagalla [1]
13Rachid Rayess [1]
14Rahul Shah [1]
15Linda Shattuck [1]
16Emily Shriver [1]
17Eric Soenen [2]
18Tad Truex [1]
19Paul G. Villarrubia (Paul Villarrubia) [2]
20Shi-Huang Yin [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)