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Shi-Huang Yin

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2002
1EEJoel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah, Emily Shriver, Shi-Huang Yin, Shannon V. Morton: Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU. ACM Great Lakes Symposium on VLSI 2002: 1-6

Coauthor Index

1Dan Bailey [1]
2David Bertucci [1]
3Gabriel P. Bischoff [1]
4Daniel E. Dever [1]
5Mike Gowan [1]
6Joel Grodstein [1]
7Roy Lane [1]
8Brian Lilly [1]
9Sue Lowell [1]
10Shannon V. Morton [1]
11Krishna Nagalla [1]
12Rachid Rayess [1]
13Rahul Shah [1]
14Linda Shattuck [1]
15Emily Shriver [1]
16Tad Truex [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)