Shi-Huang Yin

2002
1	EE	Joel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah, Emily Shriver, Shi-Huang Yin, Shannon V. Morton: Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU. ACM Great Lakes Symposium on VLSI 2002: 1-6

Coauthor Index

1	Dan Bailey	[1]
2	David Bertucci	[1]
3	Gabriel P. Bischoff	[1]
4	Daniel E. Dever	[1]
5	Mike Gowan	[1]
6	Joel Grodstein	[1]
7	Roy Lane	[1]
8	Brian Lilly	[1]
9	Sue Lowell	[1]
10	Shannon V. Morton	[1]
11	Krishna Nagalla	[1]
12	Rachid Rayess	[1]
13	Rahul Shah	[1]
14	Linda Shattuck	[1]
15	Emily Shriver	[1]
16	Tad Truex	[1]