2007 |
7 | EE | Gabriel P. Bischoff,
Karl S. Brace,
Gianpiero Cabodi:
A Compositional Approach for Equivalence Checking of Sequential Circuits with Unknown Reset State and Overlapping Partitions.
EUROCAST 2007: 505-514 |
2005 |
6 | EE | Gabriel P. Bischoff,
Karl S. Brace,
Gianpiero Cabodi,
Sergio Nocco,
Stefano Quer:
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking.
Electr. Notes Theor. Comput. Sci. 119(2): 33-49 (2005) |
2002 |
5 | EE | Joel Grodstein,
Rachid Rayess,
Tad Truex,
Linda Shattuck,
Sue Lowell,
Dan Bailey,
David Bertucci,
Gabriel P. Bischoff,
Daniel E. Dever,
Mike Gowan,
Roy Lane,
Brian Lilly,
Krishna Nagalla,
Rahul Shah,
Emily Shriver,
Shi-Huang Yin,
Shannon V. Morton:
Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU.
ACM Great Lakes Symposium on VLSI 2002: 1-6 |
1997 |
4 | | Gabriel P. Bischoff,
Karl S. Brace,
Samir Jain,
Rahul Razdan:
Formal Implementation Verification of the Bus Interface Unit for the Alpha 21264 Microprocessor.
ICCD 1997: 16-24 |
1993 |
3 | EE | Rahul Razdan,
Gabriel P. Bischoff,
Ernst G. Ulrich:
Clock suppression techniques for synchronous circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1547-1556 (1993) |
1991 |
2 | | Joel Grodstein,
Nick Rethman,
Rahul Razdan,
Gabriel P. Bischoff:
Automatic Detection of MOS Synchronizers for Timing Verification.
ICCAD 1991: 304-307 |
1990 |
1 | | Rahul Razdan,
Gabriel P. Bischoff,
Ernst G. Ulrich:
Exploitation of Periodicity in Logic Simulation of Synchronous Circuits.
ICCAD 1990: 62-65 |