2007 |
6 | EE | C. Petit,
D. Zander:
Low voltage stress induced leakage current and time to breakdown in ultra-thin (1.2-2.3nm) oxides.
Microelectronics Reliability 47(2-3): 401-408 (2007) |
2005 |
5 | EE | C. Petit,
A. Meinertzhagen,
D. Zander,
O. Simonetti,
M. Fadlallah,
T. Maurel:
Low voltage SILC and P- and N-MOSFET gate oxide reliability.
Microelectronics Reliability 45(3-4): 479-485 (2005) |
4 | EE | D. Zander:
Comparison of interfaces states density through their energy distribution and LVSILC induced by uniform and localized injections in 2.3nm thick oxides.
Microelectronics Reliability 45(5-6): 891-894 (2005) |
2003 |
3 | EE | D. Zander,
F. Saigné,
A. Meinertzhagen,
C. Petit:
Contribution of oxide traps on defect creation and LVSILC conduction in ultra thin gate oxide devices.
Microelectronics Reliability 43(9-11): 1489-1493 (2003) |
2001 |
2 | EE | D. Zander,
C. Petit,
F. Saigné,
A. Meinertzhagen:
High field stress at and above room temperature in 2.3 nm thick oxides.
Microelectronics Reliability 41(7): 1023-1026 (2001) |
1 | | D. Zander,
F. Saigné,
A. Meinertzhagen:
Creation and thermal annealing of interface states induced by uniform or localized injection in 2.3nm thick oxides.
Microelectronics Reliability 41(9-10): 1355-1360 (2001) |