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王志英
List of publications from the DBLP Bibliography Server - FAQ
2008 | ||
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73 | EE | Jianjun Guo, Ming-che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang: Memory System Design for a Multi-core Processor. CISIS 2008: 601-606 |
72 | EE | Ming-che Lai, Jianjun Guo, Zhuxi Zhang, Zhiying Wang: Using an Automated Approach to Explore and Design a High-Efficiency Processor Element for the Multimedia Domain. CISIS 2008: 613-618 |
71 | EE | Ming-che Lai, Lei Gao, Wei Shi, Zhiying Wang: Escaping from Blocking: A Dynamic Virtual Channel for Pipelined Routers. CISIS 2008: 795-800 |
70 | EE | Ya-shuai Lü, Li Shen, Libo Huang, Zhiying Wang, Nong Xiao: Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques. DAC 2008: 197-200 |
69 | EE | Ming-che Lai, Zhiying Wang, Lei Gao, Hongyi Lu, Kui Dai: A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers. DAC 2008: 630-633 |
68 | EE | Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao, Dan Chen: A Novel Hardware Assisted Full Virtualization Technique. ICYCS 2008: 1292-1297 |
67 | EE | Jianjun Guo, Kui Dai, Ming-che Lai, Zhiying Wang: The P2P Communication Model for a Local Memory based Multi-core Processor. ICYCS 2008: 1354-1359 |
66 | EE | Rui Gong, Kui Dai, Zhiying Wang: Transient Fault Recovery on Chip Multiprocessor based on Dual Core Redundancy and Context Saving. ICYCS 2008: 148-153 |
65 | EE | Xinbiao Gan, Kui Dai, Zhiying Wang: Low-Level Component for OpenGL ES Oriented Heterogeneous Architecture with Optimization. ICYCS 2008: 200-205 |
64 | EE | Lei Wang, Zhiying Wang, Kui Dai: Performance Bound Analysis and Retiming of Timed Circuits. ICYCS 2008: 212-217 |
63 | EE | Xinbiao Gan, Kui Dai, Libo Huang, Li Shen, Zhiying Wang: A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture. MUE 2008: 83-86 |
62 | EE | Jianjun Guo, Ming-che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang: Hierarchical memory system design for a heterogeneous multi-core processor. SAC 2008: 1504-1508 |
61 | EE | Rui Gong, Chen Wei, Liu Fang, Kui Dai, Zhiying Wang: Control flow checking and recovering based on 8051 architecture. SAC 2008: 1550-1551 |
60 | EE | Jun Ma, Jiang-chun Ren, Zhiying Wang, Yaokai Zhu: Research of a Secure File System for Protection of Intellectual Property Right. WAIM 2008: 661-665 |
59 | EE | Rui Gong, Wei Chen, Fang Liu, Kui Dai, Zhiying Wang: A New Approach to Single Event Effect Tolerance Based on Asynchronous Circuit Technique. J. Electronic Testing 24(1-3): 57-65 (2008) |
2007 | ||
58 | EE | Gang Jin, Lei Wang, Zhiying Wang, Kui Dai: An Optimal Design Method for De-synchronous Circuit Based on Control Graph. APPT 2007: 70-79 |
57 | EE | Yong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai: Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. Asia-Pacific Computer Systems Architecture Conference 2007: 354-363 |
56 | EE | Yong Li, Zhiying Wang, Kui Dai: A Low-Power Application Specific Instruction Set Processor Using Asynchronous Function Units. CIT 2007: 817-822 |
55 | EE | Zhiying Wang, Shilun Ge: Study on Key Technologies of Shipbuilding Virtual Enterprise Information Integration Oriented Agile Manufacturing. CONFENIS (2) 2007: 961-969 |
54 | EE | Yong Li, Zhiying Wang, Jian Ruan, Kui Dai: A Low-Power Globally Synchronous Locally Asynchronous FFT Processor. HPCC 2007: 168-179 |
53 | EE | Hao Ren, Nong Xiao, Zhiying Wang: An Interest-Based Intelligent Link Selection Algorithm in Unstructured P2P Environment. ICA3PP 2007: 326-337 |
52 | EE | Hao Ren, Nong Xiao, Zhiying Wang: A Distributed Cut Set Discovery Algorithm in P2P Environment. ICPP Workshops 2007: 62 |
51 | EE | Libo Huang, Li Shen, Kui Dai, Zhiying Wang: A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. IEEE Symposium on Computer Arithmetic 2007: 69-76 |
50 | EE | Wang Jingxin, Zhiying Wang, Kui Dai: Security Event Management System based on Mobile Agent Technology. ISI 2007: 166-171 |
49 | EE | Miao Wang, Guiming Wu, Zhiying Wang: Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors. ISPA 2007: 946-957 |
48 | EE | Jian Ruan, Zhiying Wang, Kui Dai, Yong Li: Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. International Conference on Computational Science (4) 2007: 251-258 |
47 | EE | Ming-che Lai, Jianjun Guo, Lv Yasuai, Kui Dai, Zhiying Wang: The Research of an Embedded Processor Element for Multimedia Domain. MCAM 2007: 267-276 |
46 | EE | Jian Ruan, Zhiying Wang, Kui Dai, Yong Li: Design and Test of Self-checking Asynchronous Control Circuit. PATMOS 2007: 320-329 |
45 | EE | Ming-che Lai, Zhiying Wang, Jianjun Guo, Kui Dai, Shen Li: Template Vertical Dictionary-Based Program Compression Scheme on the TTA. PATMOS 2007: 43-52 |
2006 | ||
44 | EE | Chenlin Huang, Huaping Hu, Zhiying Wang: A Dynamic Trust Model Based on Feedback Control Mechanism for P2P Applications. ATC 2006: 312-321 |
43 | EE | Jianjun Guo, Kui Dai, Zhiying Wang: A Heterogeneous Multi-core Processor Architecture for High Performance Computing. Asia-Pacific Computer Systems Architecture Conference 2006: 359-365 |
42 | EE | Lei Wang, Zhiying Wang, Kui Dai: Cycle Period Analysis and Optimization of Timed Circuits. Asia-Pacific Computer Systems Architecture Conference 2006: 502-508 |
41 | EE | Wei Chen, Rui Gong, Kui Dai, Fang Liu, Zhiying Wang: Two New Space-Time Triple Modular Redundancy Techniques for Improving Fault Tolerance of Computer Systems. CIT 2006: 175 |
40 | EE | Lei Wang, Zhiying Wang, Kui Dai: An Approximate Method for Performance Evaluation of Asynchronous Pipeline Rings. CIT 2006: 244 |
39 | EE | Rui Gong, Chen Wei, Liu Fang, Kui Dai, Zhiying Wang: Modified Triple Modular Redundancy Structure based on Asynchronous Circuit Technique. DFT 2006: 184-196 |
38 | Hong Yue, Kui Dai, Zhiying Wang: A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications. ESA 2006: 100-104 | |
37 | Xue-mi Zhao, Zhiying Wang: Power Optimization of Interconnection Networks for Transport Triggered Architecture. ESA 2006: 154-159 | |
36 | Wei Chen, Rui Gong, Fang Liu, Kui Dai, Zhiying Wang: Improving the Fault Tolerance of a Computer System with Space-Time Triple Modular Redundancy. ESA 2006: 183-190 | |
35 | EE | Hao Ren, Zhiying Wang, Zhong Liu: A Hyper-cube based P2P Information Service for Data Grid. GCC 2006: 508-513 |
34 | EE | Jianjun Guo, Kui Dai, Zhiying Wang: A High Performance Heterogeneous Architecture and Its Optimization Design. HPCC 2006: 300-309 |
33 | EE | Hong Yue, Zhiying Wang, Kui Dai: A Heterogeneous Embedded MPSoC for Multimedia Applications. HPCC 2006: 591-600 |
32 | EE | Ming-che Lai, Kui Dai, Lu Hong-yi, Zhiying Wang: A Novel Data-Parallel Coprocessor for Multimedia Signal Processing. ICME 2006: 369-372 |
31 | EE | Jing-Xin Wang, Zhiying Wang, Kui Dai: Intrusion Alert Analysis Based on PCA and the LVQ Neural Network. ICONIP (3) 2006: 217-224 |
30 | EE | Zhiying Wang, Chen He: A minimum transmission power AM-MIMO system. ISCAS 2006 |
29 | EE | Jing-Xin Wang, Zhiying Wang, Kui Dai: A PCA-LVQ Model for Intrusion Alert Analysis. ISI 2006: 715-716 |
28 | EE | Fangyong Hou, Hongjun He, Zhiying Wang, Kui Dai: An Efficient Way to Build Secure Disk. ISPEC 2006: 290-301 |
27 | EE | Yuan-man Tong, Zhiying Wang, Kui Dai, Hongyi Lu: Designing Power Analysis Resistant and High Performance Block Cipher Coprocessor Using WDDL and Wave-Pipelining. Inscrypt 2006: 66-77 |
26 | EE | Xue-mi Zhao, Zhiying Wang, Hongyi Lu, Kui Dai: A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. VLSI-SoC 2006: 216-221 |
25 | EE | Yong Li, Lei Wang, Rui Gong, Kui Dai, Zhiying Wang: Research and Implementation of a 32-Bit Asynchronous Multiplier. Journal of Computer Research and Development 43(12): 2152-2157 (2006) |
2005 | ||
24 | EE | Jianjun Guo, Kui Dai, Yun Cheng, Zhiying Wang: Research on Fast Block Participation Mode Selection Algorithm in H.264. ACIS-ICIS 2005: 111-113 |
23 | EE | Jingbin An, Yan Jia, Zhiying Wang: Implementing Component Persistence in CCM Based on StarPSS. APPT 2005: 226-233 |
22 | EE | Yun Cheng, Kui Dai, Zhiying Wang, Jianjun Guo: A Fast Motion Estimation Algorithm Based on Diamond and Simplified Square Search Patterns. CIARP 2005: 440-449 |
21 | EE | Dan Wu, Zhiying Wang, Kui Dai: Retargetable Machine-Description System: Multi-layer Architecture Approach. GCC 2005: 1161-1166 |
20 | EE | Kebo Wang, Zhiying Wang, Yan Jia, Weihong Han: An Optimal Component Distribution Algorithm Based on MINLP. ICCNMC 2005: 808-816 |
19 | EE | Fang Liu, Kui Dai, Zhiying Wang, Jun Ma: Research on Fuzzy Group Decision Making in Security Risk Assessment. ICN (2) 2005: 1114-1121 |
18 | EE | Hong Yue, Ming-che Lai, Kui Dai, Zhiying Wang: Design of a Configurable Embedded Processor Architecture for DSP Functions. ICPADS (2) 2005: 27-31 |
17 | EE | Fangyong Hou, Zhiying Wang, Kui Dai, Yun Liu: Protecting Mass Data Basing on Small Trusted Agent. ISPEC 2005: 362-373 |
16 | EE | Yun Cheng, Zhiying Wang, Kui Dai, Jianjun Guo: A Fast Motion Estimation Algorithm Based on Diamond and Triangle Search Patterns. IbPRIA (1) 2005: 419-426 |
15 | EE | Jiang-chun Ren, Kui Dai, Zhiying Wang: Trust-Enhanced Alteration Scenario for Universal Computer. PRDC 2005: 275-280 |
14 | EE | Fang Liu, Yong Chen, Kui Dai, Zhiying Wang, Zhiping Cai: Research on Risk Probability Estimating Using Fuzzy Clustering for Dynamic Security Assessment. RSFDGrC (2) 2005: 539-547 |
13 | Jiang-chun Ren, Kui Dai, Zhiying Wang, Xue-mi Zhao, Yuan-man Tong: Design and Implementation a TPM Chip SUP320 by SOC. SEC 2005: 143-154 | |
12 | EE | Zhiying Wang, Chen He: A Channel Estimation Scheme for MIMO-MC-CDMA Downlink in High Mobility Environments. IEICE Transactions 88-B(3): 1282-1286 (2005) |
2004 | ||
11 | EE | Fang Liu, Kui Dai, Zhiying Wang: Improving Security Architecture Development Based on Multiple Criteria Decision Making. AWCC 2004: 214-218 |
10 | EE | Lei Wang, Hongyi Lu, Kui Dai, Zhiying Wang: TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. Asia-Pacific Computer Systems Architecture Conference 2004: 126-136 |
9 | EE | Fangyong Hou, Zhiying Wang, Yuhua Tang, Jifeng Liu: Verify Memory Integrity Basing on Hash Tree and MAC Combined Approach. EUC 2004: 869-878 |
8 | EE | Chenlin Huang, Huaping Hu, Zhiying Wang: Modeling Time-Related Trust. GCC Workshops 2004: 382-389 |
7 | EE | Ming-che Lai, Kui Dai, Li Shen, Zhiying Wang: A New Technique for Program Code Compression in Embedded Microprocessor. ICESS 2004: 158-164 |
6 | EE | Fangyong Hou, Zhiying Wang, Yuhua Tang, Zhen Liu: Protecting integrity and confidentiality for data communication. ISCC 2004: 357-362 |
5 | EE | Jianzhuang Lu, Chunyuan Zhang, Zhiying Wang, Yun Cheng, Dan Wu: A Case of SCMP with TLS. ISPA 2004: 975-984 |
4 | Fangyong Hou, Zhiying Wang, Zhen Liu, Yuhua Tang, Yun Liu: Building Efficient and Secure Communication for Grid. PDPTA 2004: 894-900 | |
3 | Fangyong Hou, Zhiying Wang, Yuhua Tang, Zhen Liu, Jin Zhou: Protect Data Stored on Remote Server. PDPTA 2004: 929-938 | |
2003 | ||
2 | EE | Li Shen, Zhiying Wang, Jianzhuang Lu: Predicate Analysis Based on Path Information. APPT 2003: 147-151 |
1 | EE | Fangyong Hou, Zhiying Wang, Zhen Liu, Yun Liu: Avoid Powerful Tampering by Malicious Host. GCC (1) 2003: 907-915 |