| 2008 |
|---|
| 6 | EE | Jianjun Guo,
Ming-che Lai,
Zhengyuan Pang,
Libo Huang,
Fangyuan Chen,
Kui Dai,
Zhiying Wang:
Memory System Design for a Multi-core Processor.
CISIS 2008: 601-606 |
| 5 | EE | Ya-shuai Lü,
Li Shen,
Libo Huang,
Zhiying Wang,
Nong Xiao:
Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques.
DAC 2008: 197-200 |
| 4 | EE | Xinbiao Gan,
Kui Dai,
Libo Huang,
Li Shen,
Zhiying Wang:
A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture.
MUE 2008: 83-86 |
| 3 | EE | Jianjun Guo,
Ming-che Lai,
Zhengyuan Pang,
Libo Huang,
Fangyuan Chen,
Kui Dai,
Zhiying Wang:
Hierarchical memory system design for a heterogeneous multi-core processor.
SAC 2008: 1504-1508 |
| 2007 |
|---|
| 2 | EE | Libo Huang,
Li Shen,
Kui Dai,
Zhiying Wang:
A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design.
IEEE Symposium on Computer Arithmetic 2007: 69-76 |
| 1 | EE | Libo Huang,
Ming-che Lai,
Kui Dai,
Hong Yue,
Li Shen:
Hardware Support for Arithmetic Units of Processor with Multimedia Extension.
MUE 2007: 633-637 |
