2008 |
14 | EE | Jianjun Guo,
Ming-che Lai,
Zhengyuan Pang,
Libo Huang,
Fangyuan Chen,
Kui Dai,
Zhiying Wang:
Memory System Design for a Multi-core Processor.
CISIS 2008: 601-606 |
13 | EE | Ming-che Lai,
Jianjun Guo,
Zhuxi Zhang,
Zhiying Wang:
Using an Automated Approach to Explore and Design a High-Efficiency Processor Element for the Multimedia Domain.
CISIS 2008: 613-618 |
12 | EE | Ming-che Lai,
Lei Gao,
Wei Shi,
Zhiying Wang:
Escaping from Blocking: A Dynamic Virtual Channel for Pipelined Routers.
CISIS 2008: 795-800 |
11 | EE | Gao Lei,
Ming-che Lai,
Zhenghu Gong:
Exploiting the Thread-Level Parallelism for BGP on Multi-core.
CNSR 2008: 510-516 |
10 | EE | Ming-che Lai,
Zhiying Wang,
Lei Gao,
Hongyi Lu,
Kui Dai:
A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers.
DAC 2008: 630-633 |
9 | EE | Jianjun Guo,
Kui Dai,
Ming-che Lai,
Zhiying Wang:
The P2P Communication Model for a Local Memory based Multi-core Processor.
ICYCS 2008: 1354-1359 |
8 | EE | Jianjun Guo,
Ming-che Lai,
Zhengyuan Pang,
Libo Huang,
Fangyuan Chen,
Kui Dai,
Zhiying Wang:
Hierarchical memory system design for a heterogeneous multi-core processor.
SAC 2008: 1504-1508 |
7 | EE | Lei Gao,
Zhenghu Gong,
Yaping Liu,
Ming-che Lai,
Wei Peng:
A TLP approach for BGP based on local speculation.
Science in China Series F: Information Sciences 51(11): 1772-1784 (2008) |
2007 |
6 | EE | Ming-che Lai,
Jianjun Guo,
Lv Yasuai,
Kui Dai,
Zhiying Wang:
The Research of an Embedded Processor Element for Multimedia Domain.
MCAM 2007: 267-276 |
5 | EE | Libo Huang,
Ming-che Lai,
Kui Dai,
Hong Yue,
Li Shen:
Hardware Support for Arithmetic Units of Processor with Multimedia Extension.
MUE 2007: 633-637 |
4 | EE | Ming-che Lai,
Zhiying Wang,
Jianjun Guo,
Kui Dai,
Shen Li:
Template Vertical Dictionary-Based Program Compression Scheme on the TTA.
PATMOS 2007: 43-52 |
2006 |
3 | EE | Ming-che Lai,
Kui Dai,
Lu Hong-yi,
Zhiying Wang:
A Novel Data-Parallel Coprocessor for Multimedia Signal Processing.
ICME 2006: 369-372 |
2005 |
2 | EE | Hong Yue,
Ming-che Lai,
Kui Dai,
Zhiying Wang:
Design of a Configurable Embedded Processor Architecture for DSP Functions.
ICPADS (2) 2005: 27-31 |
2004 |
1 | EE | Ming-che Lai,
Kui Dai,
Li Shen,
Zhiying Wang:
A New Technique for Program Code Compression in Embedded Microprocessor.
ICESS 2004: 158-164 |