| 2006 |
|---|
| 7 | EE | James H. Stathis,
S. Zafar:
The negative bias temperature instability in MOS devices: A review.
Microelectronics Reliability 46(2-4): 270-286 (2006) |
| 2003 |
|---|
| 6 | EE | James H. Stathis,
R. Rodríguez,
Barry P. Linder:
Circuit implications of gate oxide breakdown.
Microelectronics Reliability 43(8): 1193-1197 (2003) |
| 5 | EE | James H. Stathis,
Barry P. Linder,
R. Rodríguez,
Salvatore Lombardo:
Reliability of ultra-thin oxides in CMOS circuits.
Microelectronics Reliability 43(9-11): 1353-1360 (2003) |
| 4 | EE | R. Rodríguez,
James H. Stathis,
Barry P. Linder,
Rajiv V. Joshi,
Ching-Te Chuang:
Influence and model of gate oxide breakdown on CMOS inverters.
Microelectronics Reliability 43(9-11): 1439-1444 (2003) |
| 2002 |
|---|
| 3 | EE | James H. Stathis:
Reliability limits for the gate insulator in CMOS technology.
IBM Journal of Research and Development 46(2-3): 265-286 (2002) |
| 2 | EE | R. Rodríguez,
James H. Stathis,
Barry P. Linder,
S. Kowalczyk,
Ching-Te Chuang,
Rajiv V. Joshi,
Gregory A. Northrop,
Kerry Bernstein,
A. J. Bhavnagarwala,
Salvatore Lombardo:
Analysis of the effect of the gate oxide breakdown on SRAM stability.
Microelectronics Reliability 42(9-11): 1445-1448 (2002) |
| 1 | EE | Salvatore Lombardo,
James H. Stathis,
Barry P. Linder:
Dependence of Post-Breakdown Conduction on Gate Oxide Thickness.
Microelectronics Reliability 42(9-11): 1481-1484 (2002) |
