| 2007 |
|---|
| 40 | EE | Rangakrishnan Srinivasan,
Didem Zeliha Turker,
Sang Wook Park,
Edgar Sánchez-Sinencio:
A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications.
ISCAS 2007: 429-432 |
| 39 | EE | Burak Kelleci,
Edgar Sánchez-Sinencio,
Aydin I. Karsilayan:
THD+Noise Estimation in Class-D Amplifiers.
ISCAS 2007: 465-468 |
| 2006 |
|---|
| 38 | EE | Alberto Valdes-Garcia,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
On-Chip Testing Techniques for RF Wireless Transceivers.
IEEE Design & Test of Computers 23(4): 268-277 (2006) |
| 2005 |
|---|
| 37 | EE | Shouli Yan,
Jingyu Hu,
Tongyu Song,
Edgar Sánchez-Sinencio:
A constant-g/sub m/ rail-to-rail op amp input stage using dynamic current scaling technique.
ISCAS (3) 2005: 2567-2570 |
| 36 | EE | Shouli Yan,
Jingyu Hu,
Tongyu Song,
Edgar Sánchez-Sinencio:
Constant-g/sub m/ techniques for rail-to-rail CMOS amplifier input stages: a comparative study.
ISCAS (3) 2005: 2571-2574 |
| 35 | EE | Feng Zhu,
Shouli Yan,
Jingyu Hu,
Edgar Sánchez-Sinencio:
Feedforward reversed nested Miller compensation techniques for three-stage amplifiers.
ISCAS (3) 2005: 2575-2578 |
| 34 | EE | Alberto Valdes-Garcia,
Radhika Venkatasubramanian,
Rangakrishnan Srinivasan,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers.
VTS 2005: 249-254 |
| 33 | EE | Marcia G. Méndez-Rivera,
Alberto Valdes-Garcia,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
An On-Chip Spectrum Analyzer for Analog Built-In Testing.
J. Electronic Testing 21(3): 205-219 (2005) |
| 2004 |
|---|
| 32 | EE | Xiaohua Fan,
Chinmaya Mishra,
Edgar Sánchez-Sinencio:
Single Miller capacitor compensated multistage amplifiers for large capacitive load applications.
ISCAS (1) 2004: 493-496 |
| 31 | EE | Stanislaw Szczepanski,
Slawomir Koziel,
Edgar Sánchez-Sinencio:
Linearized CMOS OTA using active-error feedforward technique.
ISCAS (1) 2004: 549-552 |
| 30 | | Chunyu Xin,
Edgar Sánchez-Sinencio:
A linearization technique for RF low noise amplifier.
ISCAS (4) 2004: 313-316 |
| 29 | | Ari Y. Valero-López,
Alberto Valdes-Garcia,
Edgar Sánchez-Sinencio:
Frequency synthesizer for on-chip testing and automated tuning.
ISCAS (4) 2004: 565-568 |
| 28 | EE | Alberto Valdes-Garcia,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
An On-Chip Transfer Function Characterization System for Analog Built-in Testing.
VTS 2004: 261-266 |
| 2003 |
|---|
| 27 | EE | Ahmed Emira,
Edgar Sánchez-Sinencio:
Variable gain amplifier with offset cancellation.
ACM Great Lakes Symposium on VLSI 2003: 265-268 |
| 26 | EE | Ahmed Emira,
Edgar Sánchez-Sinencio:
A low-power CMOS complex filter for Bluetooth with frequency tuning.
ISCAS (1) 2003: 489-492 |
| 25 | EE | Antonio F. Mondragón-Torres,
Terry Mayhugh Jr.,
José Pineda de Gyvez,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
An Analog Integrated Circuit Design Laboratory.
MSE 2003: 91-92 |
| 2002 |
|---|
| 24 | EE | Chunyu Xin,
Bo Xia,
Wenjun Sheng,
Ari Y. Valero-López,
Edgar Sánchez-Sinencio:
A mixed-mode IF GFSK demodulator for Bluetooth.
ISCAS (3) 2002: 457-460 |
| 23 | EE | K. Shu,
Edgar Sánchez-Sinencio:
A 5-GHz prescaler using improved phase switching.
ISCAS (3) 2002: 85-88 |
| 22 | EE | K. Shu,
Edgar Sánchez-Sinencio,
José Silva-Martínez:
A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling.
ISCAS (4) 2002: 791-794 |
| 21 | EE | P. Kallam,
Edgar Sánchez-Sinencio,
Aydin I. Karsilayan:
An improved Q-tuning scheme and a fully symmetric OTA.
ISCAS (5) 2002: 165-168 |
| 20 | EE | Ahmed Emira,
Edgar Sánchez-Sinencio,
M. Schneider:
Design tradeoffs of CMOS current mirrors using one-equation for all-region model.
ISCAS (5) 2002: 45-48 |
| 19 | EE | Bo Xia,
Shouli Yan,
Edgar Sánchez-Sinencio:
An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters.
ISCAS (5) 2002: 593-596 |
| 18 | EE | Marcia G. Méndez-Rivera,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
On-chip spectrum analyzer for built-in testing analog ICs.
ISCAS (5) 2002: 61-64 |
| 2001 |
|---|
| 17 | EE | A. Shankar,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits.
ISCAS (1) 2001: 643-646 |
| 16 | EE | F. Lobato-Lopez,
José Silva-Martínez,
Edgar Sánchez-Sinencio:
Linear cellular neural networks.
ISCAS (3) 2001: 437-440 |
| 1999 |
|---|
| 15 | EE | G. Xu,
Sherif H. K. Embabi,
P. Hao,
Edgar Sánchez-Sinencio:
A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design.
ISCAS (2) 1999: 606-609 |
| 14 | EE | O. A. Gonzalez,
Gunhee Han,
José Pineda de Gyvez,
Edgar Sánchez-Sinencio:
CMOS cryptosystem using a Lorenz chaotic oscillator.
ISCAS (5) 1999: 442-445 |
| 1998 |
|---|
| 13 | EE | Lei Wang,
José Pineda de Gyvez,
Edgar Sánchez-Sinencio:
Time multiplexed color image processing based on a CNN with cell-state outputs.
IEEE Trans. VLSI Syst. 6(2): 314-322 (1998) |
| 1996 |
|---|
| 12 | EE | Fan You,
Sherif H. K. Embabi,
Edgar Sánchez-Sinencio:
A 1.5V class AB output buffer.
ISLPED 1996: 285-288 |
| 1995 |
|---|
| 11 | | Apollo Q. Fong,
Ajay Kanji,
Edgar Sánchez-Sinencio,
José Pineda de Gyvez:
A Universal Interface Between PC and Neural Networks Hardware.
ISCAS 1995: 1169-1172 |
| 10 | | Gunhee Han,
Edgar Sánchez-Sinencio:
A General Purpose Discrete-Time Multiplexing Neuron-Array Architecture.
ISCAS 1995: 1320-1323 |
| 9 | | Fan You,
Sherif H. K. Embabi,
Edgar Sánchez-Sinencio,
A. Ganesan:
A Design Scheme to Stabilize the Active Gain Enhancement Amplifier.
ISCAS 1995: 1976-1979 |
| 8 | | Gabriel J. Gómez,
Sherif H. K. Embabi,
Edgar Sánchez-Sinencio,
Martin C. Lefebvre:
A Nonlinear Macromodel for CMOS OTAs.
ISCAS 1995: 920-923 |
| 1994 |
|---|
| 7 | | Joseph T. Nabicht,
Edgar Sánchez-Sinencio,
Jaime Ramírez-Angulo:
A Programmable 1.8-18MHz High-Q Fully-Differential Continuous-Time Filter with 1.5-2 Power Supply.
ISCAS 1994: 653-656 |
| 6 | | Jaime Ramírez-Angulo,
Edgar Sánchez-Sinencio:
Two Approaches for Current-Mode Filters using Voltage Follower and Transconductance Multipliers Building Blocks.
ISCAS 1994: 669-672 |
| 1993 |
|---|
| 5 | | Jaime Ramírez-Angulo,
Roberto Sadkowski,
Edgar Sánchez-Sinencio:
Linearity, Accuracy and Bandwidth Considerations in Wideband CMOS Voltage Amplifiers.
ISCAS 1993: 1251-1254 |
| 4 | | Jaime Ramírez-Angulo,
Edgar Sánchez-Sinencio:
High Frequency Compensated Current-mode Ladder Filters Using Multiple Output OTAs.
ISCAS 1993: 1412-1415 |
| 3 | | Sterling L. Smith,
Edgar Sánchez-Sinencio:
3v High-frequency Current-mode Filters.
ISCAS 1993: 1459-1462 |
| 2 | EE | Y. He,
Ugur Çilingiroglu,
Edgar Sánchez-Sinencio:
A high-density and low-power charge-based Hamming network.
IEEE Trans. VLSI Syst. 1(1): 56-62 (1993) |
| 1985 |
|---|
| 1 | EE | Edgar Sánchez-Sinencio,
Jaime Ramírez-Angulo:
AROMA: An Area Optimized CAD Program for Cascade SC Filter Design.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 296-303 (1985) |
