Motokazu Ozawa

2006
8	EE	Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori: Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core. IEICE Transactions 89-C(3): 287-294 (2006)
7	EE	Fumio Arakawa, Tetsuya Yamada, Takashi Okada, Makoto Ishikawa, Yuki Kondo, Motokazu Ozawa, Tomoyuki Kodama, Osamu Nishii, Toshihiro Hattori, Tatsuya Kamei, Junichi Nishimoto, Shinichi Yoshioka: Development of processor cores for digital consumer appliances. Systems and Computers in Japan 37(3): 10-19 (2006)
2005
6	EE	Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori: Low-Power Design of 90-nm SuperH Processor Core. ICCD 2005: 258-266
5	EE	Makoto Ishikawa, Tatsuya Kamei, Yuki Kondo, Masanao Yamaoka, Yasuhisa Shimazaki, Motokazu Ozawa, Saneaki Tamaki, Mikio Furuyama, Tadashi Hoshi, Fumio Arakawa, Osamu Nishii, Kenji Hirose, Shinichi Yoshioka, Toshihiro Hattori: A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones. IEICE Transactions 88-C(4): 528-535 (2005)
4	EE	Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Motokazu Ozawa, Osamu Nishii, Toshihiro Hattori: SH-X: an embedded processor core for consumer appliances. SIGARCH Computer Architecture News 33(3): 33-40 (2005)
2001
3	EE	Motokazu Ozawa, Masashi Imai, Hiroshi Nakamura, Takashi Nanya, Yoichiro Ueno: Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors. ASYNC 2001: 162-172
1998
2		Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya: TITAC-2: An Asynchronous 32-bit Microprocessor. ASP-DAC 1998: 319-320
1997
1		Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya: TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model. ICCD 1997: 288-294

Coauthor Index

1	Masahide Abe	[6] [8]
2	Fumio Arakawa	[4] [5] [6] [7] [8]
3	Taro Fujii	[1] [2]
4	Izumi Fukasaku	[1] [2]
5	Mikio Furuyama	[5]
6	Toshihiro Hattori	[4] [5] [6] [7] [8]
7	Kenji Hirose	[5]
8	Tadashi Hoshi	[5]
9	Masashi Imai	[1] [2] [3]
10	Makoto Ishikawa	[4] [5] [6] [7] [8]
11	Tatsuya Kamei	[4] [5] [7]
12	Tomoyuki Kodama	[7]
13	Yuki Kondo	[4] [5] [7]
14	Manabu Kusaoke	[6] [8]
15	Masashi Kuwako	[1] [2]
16	Hiroshi Nakamura	[3]
17	Takashi Nanya	[1] [2] [3]
18	Osamu Nishii	[4] [5] [6] [7] [8]
19	Junichi Nishimoto	[7]
20	Yusuke Nitta	[6] [8]
21	Kenji Ogura	[6] [8]
22	Takashi Okada	[7]
23	Yasuhisa Shimazaki	[5]
24	Kiwamu Takada	[6] [8]
25	Akihiro Takamura	[1] [2]
26	Saneaki Tamaki	[5]
27	Yoichiro Ueno	[1] [2] [3]
28	Tetsuya Yamada	[6] [7] [8]
29	Masanao Yamaoka	[5]
30	Shinichi Yoshioka	[5] [7]

Colors in the list of coauthors