| 2007 |
|---|
| 12 | EE | Hirokatsu Shirahama,
Akira Mochizuki,
Takahiro Hanyu,
Masami Nakajima,
Kazutami Arimoto:
Design of a Processing Element Based on Quaternary Differential Logic for a Multi-Core SIMD Processor.
ISMVL 2007: 43 |
| 11 | EE | Akira Mochizuki,
Masatomo Miura,
Takahiro Hanyu:
High-Performance Multiple-Valued Comparator Based on Active-Load Dual-Rail Differential Logic for Crosstalk-Noise Reduction.
ISMVL 2007: 57 |
| 10 | EE | Akira Mochizuki,
Hirokatsu Shirahama,
Takahiro Hanyu:
Design and Evaluation of a 54 x 54-bit Multiplier Based on Differential-Pair Circuitry.
IEICE Transactions 90-C(4): 683-691 (2007) |
| 2006 |
|---|
| 9 | EE | Akira Mochizuki,
Takeshi Kitamura,
Hirokatsu Shirahama,
Takahiro Hanyu:
Design of a Microprocessor Datapath Using Four-Valued Differential-Pair Circuits.
ISMVL 2006: 14 |
| 8 | EE | Akira Mochizuki,
Takahiro Hanyu:
Highly reliable Multiple-Valued Circuit Based on Dual-Rail Differential Logic.
ISMVL 2006: 5 |
| 7 | EE | Akira Mochizuki,
Hirokatsu Shirahama,
Takahiro Hanyu:
Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic.
IEICE Transactions 89-C(11): 1591-1597 (2006) |
| 2005 |
|---|
| 6 | EE | Naoya Onizawa,
Akira Mochizuki,
Takahiro Hanyu:
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders.
ISMVL 2005: 138-143 |
| 5 | EE | Akira Mochizuki,
Hiromitsu Kimura,
Mitsuru Ibuki,
Takahiro Hanyu:
TMR-Based Logic-in-Memory Circuit for Low-Power VLSI.
IEICE Transactions 88-A(6): 1408-1415 (2005) |
| 2004 |
|---|
| 4 | EE | Akira Mochizuki,
Takashi Takeuchi,
Takahiro Hanyu:
Intra-Chip Address-Presetting Data-Transfer Scheme Using Four-Valued Encoding.
ISMVL 2004: 192-197 |
| 2003 |
|---|
| 3 | EE | Takahiro Hanyu,
Akira Mochizuki,
Michitaka Kameyama:
Multiple-Valued Dynamic Source-Coupled Logic.
ISMVL 2003: 207-212 |
| 1995 |
|---|
| 2 | EE | Takahiro Hanyu,
Akira Mochizuki,
Michitaka Kameyama:
Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled Logic.
ISMVL 1995: 64- |
| 1994 |
|---|
| 1 | | Takahiro Hanyu,
Akira Mochizuki,
Michitaka Kameyama:
Multiple-Valued Current-Mode MOS Integrated Circuits Based on Dual-Rail Source-Coupled Logic.
ISMVL 1994: 19-26 |
