| 2007 |
|---|
| 6 | EE | S. Matsunaga,
Takahiro Hanyu,
Hiromitsu Kimura,
T. Nakamura,
H. Takasu:
Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic.
ASP-DAC 2007: 116-117 |
| 2005 |
|---|
| 5 | EE | Akira Mochizuki,
Hiromitsu Kimura,
Mitsuru Ibuki,
Takahiro Hanyu:
TMR-Based Logic-in-Memory Circuit for Low-Power VLSI.
IEICE Transactions 88-A(6): 1408-1415 (2005) |
| 2004 |
|---|
| 4 | EE | Hiromitsu Kimura,
Kostas Pagiamtzis,
Ali Sheikholeslami,
Takahiro Hanyu:
A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices.
ISMVL 2004: 340-345 |
| 2002 |
|---|
| 3 | EE | Hiromitsu Kimura,
Takahiro Hanyu,
Michitaka Kameyama:
Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition.
ISMVL 2002: 161- |
| 2000 |
|---|
| 2 | EE | Takahiro Hanyu,
Hiromitsu Kimura,
Michitaka Kameyama:
DRAM-Cell-Based Multiple-Valued Logic-in-Memory VLSI with Charge Addition and Charge Storage.
ISMVL 2000: 423-429 |
| 1999 |
|---|
| 1 | EE | Takahiro Hanyu,
Hiromitsu Kimura,
Michitaka Kameyama:
Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs.
ISMVL 1999: 30-35 |
