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Hiromitsu Kimura

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2007
6EES. Matsunaga, Takahiro Hanyu, Hiromitsu Kimura, T. Nakamura, H. Takasu: Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic. ASP-DAC 2007: 116-117
2005
5EEAkira Mochizuki, Hiromitsu Kimura, Mitsuru Ibuki, Takahiro Hanyu: TMR-Based Logic-in-Memory Circuit for Low-Power VLSI. IEICE Transactions 88-A(6): 1408-1415 (2005)
2004
4EEHiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu: A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices. ISMVL 2004: 340-345
2002
3EEHiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama: Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition. ISMVL 2002: 161-
2000
2EETakahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama: DRAM-Cell-Based Multiple-Valued Logic-in-Memory VLSI with Charge Addition and Charge Storage. ISMVL 2000: 423-429
1999
1EETakahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama: Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs. ISMVL 1999: 30-35

Coauthor Index

1Takahiro Hanyu [1] [2] [3] [4] [5] [6]
2Mitsuru Ibuki [5]
3Michitaka Kameyama [1] [2] [3]
4S. Matsunaga [6]
5Akira Mochizuki [5]
6T. Nakamura [6]
7Kostas Pagiamtzis [4]
8Ali Sheikholeslami [4]
9H. Takasu [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)