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Shashank K. Mehta

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2009
20EEChandan K. Dubey, Shashank K. Mehta: Critically indecomposable graphs. Discrete Applied Mathematics 157(1): 149-163 (2009)
2008
19EESurender Baswana, Shashank K. Mehta, Vishal Powar: Implied Set Closure and Its Application to Memory Consistency Verification. CAV 2008: 94-106
2006
18EEChandan K. Dubey, Shashank K. Mehta: On Indecomposability Preserving Elimination Sequences. COCOON 2006: 42-51
17EEDivesh Aggarwal, Chandan K. Dubey, Shashank K. Mehta: Algorithms on Graphs with Small Dominating Targets. ISAAC 2006: 141-152
2005
16EEChandan K. Dubey, Shashank K. Mehta, Jitender S. Deogun: Conditionally Critical Indecomposable Graphs. COCOON 2005: 690-700
15EEDivesh Aggarwal, Shashank K. Mehta, Jitender S. Deogun: Domination Search on Graphs with Low Dominating-Target-Number. WG 2005: 28-37
14EEChandan K. Dubey, Shashank K. Mehta: Some Algorithms on Conditionally Critical Indecomposable Graphs. Electronic Notes in Discrete Mathematics 22: 315-319 (2005)
2004
13EEAhmed M. Mahdy, Jitender S. Deogun, Shashank K. Mehta: Broadband Optical Wireless Internet: Delay Optimization. BROADNETS 2004: 736-738
12EEGeorge Nagy, Ashutosh Joshi, Mukkai S. Krishnamoorthy, Yu Lin, Daniel P. Lopresti, Shashank K. Mehta, Sharad C. Seth: A nonparametric classifier for unsegmented text. DRR 2004: 102-108
11EEAhmed M. Mahdy, Jitender S. Deogun, Shashank K. Mehta: End-to-End Delay Heuristics for Adaptive Optical Wireless Networks. MASCOTS 2004: 383-390
2003
10EEHailong Cui, Sharad C. Seth, Shashank K. Mehta: Modeling Fault Coverage of Random Test Patterns. J. Electronic Testing 19(3): 271-284 (2003)
2002
9EEHailong Cui, Sharad C. Seth, Shashank K. Mehta: A Novel Method to Improve the Test Efficiency of VLSI Tests. VLSI Design 2002: 499-504
2001
8EEMark W. Weiss, Sharad C. Seth, Shashank K. Mehta, Kent L. Einspahr: Design Verification and Functional Testing of FiniteState Machines. VLSI Design 2001: 189-195
2000
7 Mark W. Weiss, Sharad C. Seth, Shashank K. Mehta, Kent L. Einspahr: Exploiting don't cares to enhance functional tests. ITC 2000: 538-546
1999
6EEShashank K. Mehta, Sharad C. Seth: Empirical Computation of Reject Ratio in VLSI Testing. VLSI Design 1999: 506-511
5EEKent L. Einspahr, Shashank K. Mehta, Sharad C. Seth: A synthesis for testability scheme for finite state machines using clock control. IEEE Trans. on CAD of Integrated Circuits and Systems 18(12): 1780-1792 (1999)
1998
4EEKent L. Einspahr, Shashank K. Mehta, Sharad C. Seth: Synthesis of Sequential Circuits with Clock Control to Improve Testability. Asian Test Symposium 1998: 472-
1997
3EEShashank K. Mehta, Kent L. Einspahr, Sharad C. Seth: Synthesis for Testability by Two-Clock Control. VLSI Design 1997: 279-283
1993
2EEShashank K. Mehta, Laszlo Fulop: An analog neural network to solve the hamiltonian cycle problem. Neural Networks 6(6): 869-881 (1993)
1991
1 Shashank K. Mehta, Maharaj Mukherjee, George Nagy: Constrained Integer Approximation to Planar Line Intersection. Inf. Process. Lett. 40(3): 137-139 (1991)

Coauthor Index

1Divesh Aggarwal [15] [17]
2Surender Baswana [19]
3Hailong Cui [9] [10]
4Jitender S. Deogun [11] [13] [15] [16]
5Chandan K. Dubey [14] [16] [17] [18] [20]
6Kent L. Einspahr [3] [4] [5] [7] [8]
7Laszlo Fulop [2]
8Ashutosh Joshi [12]
9Mukkai S. Krishnamoorthy [12]
10Yu Lin [12]
11Daniel P. Lopresti [12]
12Ahmed M. Mahdy [11] [13]
13Maharaj Mukherjee [1]
14George Nagy [1] [12]
15Vishal Powar [19]
16Sharad C. Seth [3] [4] [5] [6] [7] [8] [9] [10] [12]
17Mark W. Weiss [7] [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)