| 2005 |
|---|
| 4 | EE | Kiyohiro Furutani,
Takeshi Hamamoto,
Takeo Miki,
Masaya Nakano,
Takashi Kono,
Shigeru Kikuda,
Yasuhiro Konishi,
Tsutomu Yoshihara:
Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories.
IEICE Transactions 88-C(2): 255-263 (2005) |
| 1994 |
|---|
| 3 | | Yasuhiro Konishi,
T. Ogawa,
M. Kumanoya:
Testing 256k Word x 16 Bit Cache DRAM (CDRAM).
ITC 1994: 360 |
| 1993 |
|---|
| 2 | EE | Masaki Tsukude,
Kazutami Arimoto,
Hideto Hidaka,
Yasuhiro Konishi,
Masanori Hayashikoshi,
Katsuhiro Suma,
Kazuyasu Fujishima:
Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters.
IEEE Design & Test of Computers 10(2): 6-12 (1993) |
| 1992 |
|---|
| 1 | | Masaki Tsukude,
Kazutami Arimoto,
Hideto Hidaka,
Yasuhiro Konishi,
Masanori Hayashikishi,
Katsunori Suma,
Kazuyasu Fujishima:
A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter.
ITC 1992: 615-622 |
