| 2009 |
|---|
| 8 | EE | Theocharis Theocharides,
Maria K. Michael,
Marios M. Polycarpou,
Ajit Dingankar:
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation.
ACM Great Lakes Symposium on VLSI 2009: 121-124 |
| 7 | EE | Sumit Ahuja,
Deepak Mathaikutty,
Gaurav Singh,
Joe Stetzer,
Sandeep K. Shukla,
Ajit Dingankar:
Power estimation methodology for a high-level synthesis framework.
ISQED 2009: 541-546 |
| 2008 |
|---|
| 6 | EE | Theocharis Theocharides,
Maria K. Michael,
Marios M. Polycarpou,
Ajit Dingankar:
A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures.
ISVLSI 2008: 99-104 |
| 5 | EE | Deepak Mathaikutty,
Sreekumar V. Kodakara,
Ajit Dingankar,
Sandeep K. Shukla,
David J. Lilja:
MMV: A Metamodeling Based Microprocessor Validation Environment.
IEEE Trans. VLSI Syst. 16(4): 339-352 (2008) |
| 2007 |
|---|
| 4 | EE | Deepak Mathaikutty,
Sandeep K. Shukla,
Sreekumar V. Kodakara,
David J. Lilja,
Ajit Dingankar:
Design fault directed test generation for microprocessor validation.
DATE 2007: 761-766 |
| 3 | EE | Deepak Mathaikutty,
Ajit Dingankar,
Sandeep K. Shukla:
A Metamodeling based Framework for Architectural Modeling and Simulator Generation.
FDL 2007: 210-218 |
| 2 | EE | Sumit Ahuja,
Deepak Mathaikutty,
Sandeep K. Shukla,
Ajit Dingankar:
Assertion-Based Modal Power Estimation.
MTV 2007: 3-7 |
| 1 | EE | Sreekumar V. Kodakara,
Deepak Mathaikutty,
Ajit Dingankar,
Sandeep K. Shukla,
David J. Lilja:
Model Based Test Generation for Microprocessor Architecture Validation.
VLSI Design 2007: 465-472 |
