| 2002 |
|---|
| 7 | EE | Laurence Goodby,
Alex Orailoglu,
Paul M. Chau:
Microarchitectural synthesis of performance-constrained, low-power VLSI designs.
ACM Trans. Design Autom. Electr. Syst. 7(1): 122-136 (2002) |
| 2000 |
|---|
| 6 | EE | Laurence Goodby,
Alex Orailoglu:
Test Quality and Fault Risk in Digital Filter Datapath BIST.
DATE 2000: 468-475 |
| 1999 |
|---|
| 5 | EE | Laurence Goodby,
Alex Orailoglu:
Redundancy and testability in digital filter datapaths.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(5): 631-644 (1999) |
| 1997 |
|---|
| 4 | EE | Laurence Goodby,
Alex Orailoglu:
Frequency-Domain Compatibility in Digital Filter BIST.
DAC 1997: 540-545 |
| 1996 |
|---|
| 3 | EE | Laurence Goodby,
Alex Orailoglu:
Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths.
DAC 1996: 813-818 |
| 1995 |
|---|
| 2 | | Laurence Goodby,
Alex Orailoglu:
Towards 100% Testable FIR Digital Filters.
ITC 1995: 394-402 |
| 1994 |
|---|
| 1 | | Laurence Goodby,
Alex Orailoglu,
Paul M. Chau:
Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs.
ICCD 1994: 323-326 |
