| |
| 2005 | ||
|---|---|---|
| 2 | EE | G. Ghidini, M. Langenbuch, R. Bottini, D. Brazzelli, A. Ghetti, N. Galbiati, G. Giusto, A. Garavaglia: Impact of interface and bulk trapped charges on transistor reliability. Microelectronics Reliability 45(5-6): 857-860 (2005) |
| 2003 | ||
| 1 | EE | G. Ghidini, A. Garavaglia, G. Giusto, A. Ghetti, R. Bottini, D. Peschiaroli, M. Scaravaggi, F. Cazzaniga, D. Ielmini: Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET. Microelectronics Reliability 43(8): 1221-1227 (2003) |
| 1 | R. Bottini | [1] [2] |
| 2 | D. Brazzelli | [2] |
| 3 | F. Cazzaniga | [1] |
| 4 | N. Galbiati | [2] |
| 5 | A. Ghetti | [1] [2] |
| 6 | G. Ghidini | [1] [2] |
| 7 | G. Giusto | [1] [2] |
| 8 | D. Ielmini | [1] |
| 9 | M. Langenbuch | [2] |
| 10 | D. Peschiaroli | [1] |
| 11 | M. Scaravaggi | [1] |