| 2002 |
|---|
| 5 | EE | Michel Renovell,
Penelope Faure,
Paolo Prinetto,
Yervant Zorian:
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA.
DELTA 2002: 297-301 |
| 2001 |
|---|
| 4 | | Michel Renovell,
Penelope Faure,
Jean Michel Portal,
Joan Figueras,
Yervant Zorian:
IS-FPGA : a new symmetric FPGA architecture with implicit scan.
ITC 2001: 924-931 |
| 3 | EE | Michel Renovell,
Jean Michel Portal,
Penelope Faure,
Joan Figueras,
Yervant Zorian:
A Discussion on Test Pattern Generation for FPGA - Implemented Circuits.
J. Electronic Testing 17(3-4): 283-290 (2001) |
| 2000 |
|---|
| 2 | EE | Michel Renovell,
Jean Michel Portal,
Penelope Faure,
Joan Figueras,
Yervant Zorian:
TOF: a tool for test pattern generation optimization of an FPGA application oriented test.
Asian Test Symposium 2000: 323-328 |
| 1992 |
|---|
| 1 | | Dennis de Champeaux,
Doug Lea,
Penelope Faure:
The Process of Object-Oriented Design.
OOPSLA 1992: 45-62 |
