| 2009 |
|---|
| 4 | EE | Jwu-E Chen,
Pei-Wen Luo,
Chin-Long Wey:
Yield evaluation of analog placement with arbitrary capacitor ratio.
ISQED 2009: 179-184 |
| 2008 |
|---|
| 3 | EE | Pei-Wen Luo,
Jwu-E Chen,
Chin-Long Wey,
Liang-Chia Cheng,
Ji-Jan Chen,
Wen-Ching Wu:
Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2097-2101 (2008) |
| 2002 |
|---|
| 2 | EE | Chih-Wen Lu,
Chung-Len Lee,
Chauchin Su,
Jwu-E Chen:
Analysis of Application of the IDDQ Technique to the Deep Sub-Micron VLSI Testing.
J. Electronic Testing 18(1): 89-97 (2002) |
| 1995 |
|---|
| 1 | EE | Yung-Yuan Chen,
Ching-Hwa Cheng,
Jwu-E Chen:
An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors.
VLSI Design 1995: 349-354 |
