| 2006 |
|---|
| 8 | EE | Martin Omaña,
José Manuel Cazeaux,
Daniele Rossi,
Cecilia Metra:
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects.
DATE 2006: 170-175 |
| 7 | | Cecilia Metra,
Daniele Rossi,
Martin Omaña,
José Manuel Cazeaux,
T. M. Mak:
Can Clock Faults be Detected Through Functional Test?
DDECS 2006: 168-173 |
| 6 | EE | Cecilia Metra,
Martin Omaña,
Daniele Rossi,
José Manuel Cazeaux,
T. M. Mak:
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation.
IOLTS 2006: 17-22 |
| 2005 |
|---|
| 5 | EE | Cecilia Metra,
Martin Omaña,
Daniele Rossi,
José Manuel Cazeaux,
T. M. Mak:
The Other Side of the Timing Equation: a Result of Clock Faults.
DFT 2005: 169-177 |
| 4 | EE | José Manuel Cazeaux,
Daniele Rossi,
Martin Omaña,
Cecilia Metra,
Abhijit Chatterjee:
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults.
IOLTS 2005: 23-28 |
| 3 | EE | José Manuel Cazeaux,
Daniele Rossi,
Cecilia Metra:
Self-Checking Voter for High Speed TMR Systems.
J. Electronic Testing 21(4): 377-389 (2005) |
| 2004 |
|---|
| 2 | EE | José Manuel Cazeaux,
Martin Omaña,
Cecilia Metra:
Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop.
IOLTS 2004: 17-24 |
| 1 | EE | José Manuel Cazeaux,
Daniele Rossi,
Cecilia Metra:
New High Speed CMOS Self-Checking Voter.
IOLTS 2004: 58-66 |
