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José Manuel Cazeaux

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2006
8EEMartin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra: Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE 2006: 170-175
7 Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak: Can Clock Faults be Detected Through Functional Test? DDECS 2006: 168-173
6EECecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak: Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS 2006: 17-22
2005
5EECecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak: The Other Side of the Timing Equation: a Result of Clock Faults. DFT 2005: 169-177
4EEJosé Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee: On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28
3EEJosé Manuel Cazeaux, Daniele Rossi, Cecilia Metra: Self-Checking Voter for High Speed TMR Systems. J. Electronic Testing 21(4): 377-389 (2005)
2004
2EEJosé Manuel Cazeaux, Martin Omaña, Cecilia Metra: Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. IOLTS 2004: 17-24
1EEJosé Manuel Cazeaux, Daniele Rossi, Cecilia Metra: New High Speed CMOS Self-Checking Voter. IOLTS 2004: 58-66

Coauthor Index

1Abhijit Chatterjee [4]
2T. M. Mak [5] [6] [7]
3Cecilia Metra [1] [2] [3] [4] [5] [6] [7] [8]
4Martin Omaña [2] [4] [5] [6] [7] [8]
5Daniele Rossi [1] [3] [4] [5] [6] [7] [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)