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Liyi Xiao

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2008
6EEBei Cao, Liyi Xiao, Yong-sheng Wang: A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata. DELTA 2008: 266-269
5EEWeiguang Sheng, Liyi Xiao, Zhigang Mao: An Automated Fault Injection Technique Based on VHDL Syntax Analysis and Stratified Sampling. DELTA 2008: 587-591
2003
4EEYong-sheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye: A Test Architecture for System-on-a-Chip. Asian Test Symposium 2003: 506
2002
3EELiyi Xiao, Yizheng Ye, Bin Li: A New Synchronization Algorithm for VHDL-AMS Simulation. J. Comput. Sci. Technol. 17(1): 28-37 (2002)
2001
2EELiyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang: A mixed-signal simulator for VHDL-AMS. ASP-DAC 2001: 287-292
1EEBin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang: CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation. Annual Simulation Symposium 2001: 78-

Coauthor Index

1Bei Cao [6]
2JinJun Guo [2]
3Guoyong Huang [1] [2]
4Bin Li [1] [2] [3]
5Zhigang Mao [5]
6Weiguang Sheng [5]
7Jinxiang Wang [4]
8Yong-sheng Wang [4] [6]
9Yizheng Ye [1] [2] [3] [4]
10Mingyan Yu [4]
11Peng Zhang [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)