2008 |
6 | EE | Bei Cao,
Liyi Xiao,
Yong-sheng Wang:
A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata.
DELTA 2008: 266-269 |
5 | EE | Weiguang Sheng,
Liyi Xiao,
Zhigang Mao:
An Automated Fault Injection Technique Based on VHDL Syntax Analysis and Stratified Sampling.
DELTA 2008: 587-591 |
2003 |
4 | EE | Yong-sheng Wang,
Liyi Xiao,
Mingyan Yu,
Jinxiang Wang,
Yizheng Ye:
A Test Architecture for System-on-a-Chip.
Asian Test Symposium 2003: 506 |
2002 |
3 | EE | Liyi Xiao,
Yizheng Ye,
Bin Li:
A New Synchronization Algorithm for VHDL-AMS Simulation.
J. Comput. Sci. Technol. 17(1): 28-37 (2002) |
2001 |
2 | EE | Liyi Xiao,
Bin Li,
Yizheng Ye,
Guoyong Huang,
JinJun Guo,
Peng Zhang:
A mixed-signal simulator for VHDL-AMS.
ASP-DAC 2001: 287-292 |
1 | EE | Bin Li,
Liyi Xiao,
Yizheng Ye,
Guoyong Huang:
CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation.
Annual Simulation Symposium 2001: 78- |