| 2004 |
|---|
| 12 | EE | Burnell G. West,
Michael F. Jones:
Digital Synchronization for Reconfigurable ATE.
ITC 2004: 1249-1254 |
| 11 | EE | Burnell G. West:
Open Architecture ATE: Prospects and Problems.
ITC 2004: 1410 |
| 2003 |
|---|
| 10 | EE | Burnell G. West:
Multi-GB/s IC Test Challenges and Solutions.
ITC 2003: 1311 |
| 9 | EE | Burnell G. West:
Simultaneous Bidirectional Test Data Flow for a Low-cost Wafer Test Strategy.
ITC 2003: 947-951 |
| 2002 |
|---|
| 8 | EE | Burnell G. West:
Open ATE Architecture: Key Challenges.
ITC 2002: 1212-1213 |
| 2001 |
|---|
| 7 | | Mark Malinoski,
Burnell G. West:
Rapid-response temperature control provides new defect screening opportunities.
ITC 2001: 903-907 |
| 2000 |
|---|
| 6 | | Luca Sartori,
Burnell G. West:
The path to one-picosecond accuracy.
ITC 2000: 619-627 |
| 1999 |
|---|
| 5 | | Burnell G. West:
Accuracy requirements in at-speed functional test.
ITC 1999: 780-787 |
| 4 | | Burnell G. West:
At-speed structural test.
ITC 1999: 795-800 |
| 1997 |
|---|
| 3 | EE | Burnell G. West:
Functional ATE can meet the challenges.
ITC 1997: 1155 |
| 1994 |
|---|
| 2 | | Didier Wimmers,
Kris Sakaitani,
Burnell G. West:
500-MHz Testing on a 100-MHz Tester.
ITC 1994: 273-278 |
| 1983 |
|---|
| 1 | | Burnell G. West:
Attainable Accuracy of Autocalibrating VLSI Test Systems.
ITC 1983: 193-199 |
