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2006 | ||
---|---|---|
2 | EE | Dac Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel: Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor. ASP-DAC 2006: 871-878 |
2005 | ||
1 | EE | Daniel L. Stasiak, Rajat Chaudhry, Dennis Cox, Stephen D. Posluszny, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Michael Wang: Cell Processor Low-Power Design Methodology. IEEE Micro 25(6): 71-78 (2005) |
1 | Hans-Werner Anderson | [2] |
2 | Erwin Behnen | [2] |
3 | Mark Bolliger | [2] |
4 | Rajat Chaudhry | [1] |
5 | Dennis Cox | [1] |
6 | Sanjay Gupta | [2] |
7 | Paul E. Harvey | [2] |
8 | H. Peter Hofstee | [2] |
9 | Charles R. Johns | [2] |
10 | James A. Kahle | [2] |
11 | Atsushi Kameyama | [2] |
12 | John M. Keaty | [2] |
13 | Bob Le | [2] |
14 | Sang Lee | [2] |
15 | Tuyen V. Nguyen | [2] |
16 | John G. Petrovick | [2] |
17 | Dac Pham | [2] |
18 | Mydung Pham | [2] |
19 | Juergen Pille | [2] |
20 | Stephen D. Posluszny | [1] [2] |
21 | Mack W. Riley | [2] |
22 | Daniel L. Stasiak | [1] |
23 | Joseph Verock | [2] |
24 | Michael Wang | [1] |
25 | James D. Warnock | [1] [2] |
26 | Dieter F. Wendel | [1] [2] |