| 2009 |
|---|
| 4 | EE | Taiga Takata,
Yusuke Matsunaga:
An efficient cut enumeration for depth-optimum technology mapping for LUT-based FPGAs.
ACM Great Lakes Symposium on VLSI 2009: 351-356 |
| 2008 |
|---|
| 3 | EE | Taiga Takata,
Yusuke Matsunaga:
Area recovery under depth constraint by Cut Substitution for technology mapping for LUT-based FPGAs.
ASP-DAC 2008: 144-147 |
| 2006 |
|---|
| 2 | EE | Makoto Sugihara,
Taiga Takata,
Kenta Nakamura,
Ryoichi Inanami,
Hiroaki Hayashi,
Katsumi Kishimoto,
Tetsuya Hasebe,
Yukihiro Kawano,
Yusuke Matsunaga,
Kazuaki Murakami,
Katsuya Okumura:
A character size optimization technique for throughput enhancement of character projection lithography.
ISCAS 2006 |
| 1 | EE | Makoto Sugihara,
Taiga Takata,
Kenta Nakamura,
Ryoichi Inanami,
Hiroaki Hayashi,
Katsumi Kishimoto,
Tetsuya Hasebe,
Yukihiro Kawano,
Yusuke Matsunaga,
Kazuaki Murakami,
Katsuya Okumura:
Cell Library Development Methodology for Throughput Enhancement of Character Projection Equipment.
IEICE Transactions 89-C(3): 377-383 (2006) |
