| 2008 |
|---|
| 6 | EE | Masanori Kurimoto,
Hiroaki Suzuki,
Rei Akiyama,
Tadao Yamanaka,
Haruyuki Ohkuma,
Hidehiro Takata,
Hirofumi Shinohara:
Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling.
DAC 2008: 884-889 |
| 5 | EE | Hiroaki Suzuki,
Masanori Kurimoto,
Tadao Yamanaka,
Hidehiro Takata,
Hiroshi Makino,
Hirofumi Shinohara:
Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology.
ISLPED 2008: 15-20 |
| 2007 |
|---|
| 4 | EE | Hiroaki Suzuki,
Woopyo Jeong,
Kaushik Roy:
Adaptive Supply Voltage for Low-Power Ripple-Carry and Carry-Select Adders.
IEICE Transactions 90-C(4): 865-876 (2007) |
| 2004 |
|---|
| 3 | EE | Hiroaki Suzuki,
Woopyo Jeong,
Kaushik Roy:
Low-power carry-select adder using adaptive supply voltage based on input vector patterns.
ISLPED 2004: 313-318 |
| 2003 |
|---|
| 2 | EE | Hiroaki Suzuki,
Woopyo Jeong,
Kaushik Roy:
Low Power Adder with Adaptive Supply Voltage.
ICCD 2003: 103-106 |
| 1997 |
|---|
| 1 | | Hiroaki Suzuki,
Hiroshi Makino,
Koichiro Mashiko,
Hisanori Hamano:
A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme.
ICCD 1997: 685-689 |
