1998 | ||
---|---|---|
2 | EE | Koji Nii, Hiroshi Makino, Yoshiki Tujihashi, Chikayoshi Morishima, Yasushi Hayakawa, Hiroyuki Nunogami, Takahiko Arakawa, Hisanori Hamano: A low power SRAM using auto-backgate-controlled MT-CMOS. ISLPED 1998: 293-298 |
1997 | ||
1 | Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano: A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme. ICCD 1997: 685-689 |
1 | Takahiko Arakawa | [2] |
2 | Yasushi Hayakawa | [2] |
3 | Hiroshi Makino | [1] [2] |
4 | Koichiro Mashiko | [1] |
5 | Chikayoshi Morishima | [2] |
6 | Koji Nii | [2] |
7 | Hiroyuki Nunogami | [2] |
8 | Hiroaki Suzuki | [1] |
9 | Yoshiki Tujihashi | [2] |