| 2006 |
|---|
| 5 | EE | Hui-Yuan Song,
Kundan Nepal,
R. Iris Bahar,
Joel Grodstein:
Timing analysis for full-custom circuits using symbolic DC formulations.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1815-1830 (2006) |
| 2005 |
|---|
| 4 | EE | R. Iris Bahar,
Hui-Yuan Song,
Kundan Nepal,
Joel Grodstein:
Symbolic failure analysis of complex CMOS circuits due to excessive leakage current and charge sharing.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 502-515 (2005) |
| 2004 |
|---|
| 3 | EE | Kundan Nepal,
Hui-Yuan Song,
R. Iris Bahar,
Joel Grodstein:
RESTA: a robust and extendable symbolic timing analysis tool.
ACM Great Lakes Symposium on VLSI 2004: 407-412 |
| 2003 |
|---|
| 2 | EE | Hui-Yuan Song,
S. Bohidar,
R. Iris Bahar,
Joel Grodstein:
Symbolic Failure Analysis of Custom Circuits due to Excessive Leakage Current.
ICCD 2003: 70-75 |
| 2002 |
|---|
| 1 | | Hui-Yuan Song,
R. Iris Bahar,
Joel Grodstein:
Timing Analysis for Full-Custom Circuits Using Symbolic DC Formulations.
IWLS 2002: 203-208 |
