Melanie Sherony

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4EEJonghae Kim, Jean-Olivier Plouchart, Noah Zamdmer, Melanie Sherony, Yue Tan, Meeyoung Yoon, Robert Trzcinski, Mohamed Talbi, John Safran, Asit Ray, Lawrence F. Wagner: A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate. ISLPED 2003: 434-439
3EEJean-Olivier Plouchart, Jonghae Kim, Hector Recoules, Noah Zamdmer, Yue Tan, Melanie Sherony, Asit Ray, Lawrence F. Wagner: A 0.123 mW 7.25 GHz static frequency divider by 8 in a 120-nm SOI technology. ISLPED 2003: 440-442
2EEJean-Olivier Plouchart, Noah Zamdmer, Jonghae Kim, Melanie Sherony, Yue Tan, Asit Ray, Mohamed Talbi, Lawrence F. Wagner, Kun Wu, Naftali E. Lustig, Shreesh Narasimha, Patricia O'Neil, Nghia Phan, Michael Rohn, James Strom, David M. Friend, Stephen V. Kosonocky, Daniel R. Knebel, Suhwan Kim, Keith A. Jenkins, Michel M. Rivier: Application of an SOI 0.12-µm CMOS technology to SoCs with low-power and high-frequency circuits. IBM Journal of Research and Development 47(5-6): 611-630 (2003)
1EERajiv V. Joshi, Ching-Te Chuang, S. K. H. Fung, Fari Assaderaghi, Melanie Sherony, I. Yang, Ghavam V. Shahidi: PD/SOI SRAM performance in presence of gate-to-body tunneling current. IEEE Trans. VLSI Syst. 11(6): 1106-1113 (2003)

Coauthor Index

1Fari Assaderaghi [1]
2Ching-Te Chuang [1]
3David M. Friend [2]
4S. K. H. Fung [1]
5Keith A. Jenkins [2]
6Rajiv V. Joshi [1]
7Jonghae Kim [2] [3] [4]
8Suhwan Kim [2]
9Daniel R. Knebel [2]
10Stephen V. Kosonocky [2]
11Naftali E. Lustig [2]
12Shreesh Narasimha [2]
13Patricia O'Neil [2]
14Nghia Phan [2]
15Jean-Olivier Plouchart [2] [3] [4]
16Asit Ray [2] [3] [4]
17Hector Recoules [3]
18Michel M. Rivier [2]
19Michael Rohn [2]
20John Safran [4]
21Ghavam V. Shahidi [1]
22James Strom [2]
23Mohamed Talbi [2] [4]
24Yue Tan [2] [3] [4]
25Robert Trzcinski [4]
26Lawrence F. Wagner [2] [3] [4]
27Kun Wu [2]
28I. Yang [1]
29Meeyoung Yoon [4]
30Noah Zamdmer [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)