Ghavam V. Shahidi

2003
2	EE	Rajiv V. Joshi, Ching-Te Chuang, S. K. H. Fung, Fari Assaderaghi, Melanie Sherony, I. Yang, Ghavam V. Shahidi: PD/SOI SRAM performance in presence of gate-to-body tunneling current. IEEE Trans. VLSI Syst. 11(6): 1106-1113 (2003)
2000
1	EE	Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ghavam V. Shahidi, Ching-Te Chuang: A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology. VLSI Design 2000: 44-49

Coauthor Index

1	Fari Assaderaghi	[2]
2	Ching-Te Chuang	[1] [2]
3	S. K. H. Fung	[2]
4	Wei Hwang	[1]
5	Rajiv V. Joshi	[1] [2]
6	Melanie Sherony	[2]
7	S. C. Wilson	[1]
8	I. Yang	[2]