| 2007 |
|---|
| 5 | EE | Premysl Sucha,
Zdenek Hanzálek,
Antonin Hermanek,
Jan Schier:
Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm.
VLSI Signal Processing 46(1): 35-53 (2007) |
| 2006 |
|---|
| 4 | EE | Milan Tichý,
Jan Schier,
David Gregg:
Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA.
ARC 2006: 311-316 |
| 2004 |
|---|
| 3 | EE | Jan Schier,
Antonin Hermanek:
Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA.
FPL 2004: 1149-1151 |
| 2003 |
|---|
| 2 | EE | Miroslav Lícko,
Jan Schier,
Milan Tichý,
Markus Kühl:
MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping.
FPL 2003: 984-987 |
| 1 | EE | Zdenek Pohl,
Jan Schier,
Miroslav Lícko,
Antonin Hermanek,
Milan Tichý,
Rudolf Matousek,
Jiri Kadlec:
Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping.
IPDPS 2003: 190 |
