dblp.uni-trier.dewww.uni-trier.de

Antonin Hermanek

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
7EEJohn N. Coleman, Christopher I. Softley, Jiri Kadlec, Rudolf Matousek, Milan Tichý, Zdenek Pohl, Antonin Hermanek, Nico F. Benschop: The European Logarithmic Microprocesor. IEEE Trans. Computers 57(4): 532-546 (2008)
2007
6EEPremysl Sucha, Zdenek Hanzálek, Antonin Hermanek, Jan Schier: Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm. VLSI Signal Processing 46(1): 35-53 (2007)
2006
5EEAntonin Hermanek, Michal Kunes, Michal Kvasnicka: Using Reconfigurable HW for High Dimensional CAF Computation. FPL 2006: 1-4
2004
4EEJan Schier, Antonin Hermanek: Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA. FPL 2004: 1149-1151
2003
3EEAntonin Hermanek, Zdenek Pohl, Jiri Kadlec: FPGA Implementation of the Adpaptive Lattice Filter. FPL 2003: 1095-1098
2EEZdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec: Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. IPDPS 2003: 190
2001
1EEFelix Albu, Jiri Kadlec, Christopher I. Softley, Rudolf Matousek, Antonin Hermanek, Nick Coleman, Anthony Fagan: Implementation of (Normalised) RLS Lattice on Virtex. FPL 2001: 91-100

Coauthor Index

1Felix Albu [1]
2Nico F. Benschop [7]
3John N. Coleman [7]
4Nick Coleman [1]
5Anthony Fagan [1]
6Zdenek Hanzálek [6]
7Jiri Kadlec [1] [2] [3] [7]
8Michal Kunes [5]
9Michal Kvasnicka [5]
10Miroslav Lícko [2]
11Rudolf Matousek [1] [2] [7]
12Zdenek Pohl [2] [3] [7]
13Jan Schier [2] [4] [6]
14Christopher I. Softley [1] [7]
15Premysl Sucha [6]
16Milan Tichý [2] [7]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)